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Line 37... |
#include "pic.h"
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#include "pic.h"
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#include "spr_defs.h"
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#include "spr_defs.h"
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#include "except.h"
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#include "except.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "debug.h"
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#include "debug.h"
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#include "sched.h"
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extern int cont_run;
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extern int cont_run;
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/* Reset. It initializes PIC registers. */
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/* Reset. It initializes PIC registers. */
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void pic_reset()
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void pic_reset()
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Line 50... |
mtspr(SPR_PICMR, 0);
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mtspr(SPR_PICMR, 0);
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mtspr(SPR_PICPR, 0);
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mtspr(SPR_PICPR, 0);
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mtspr(SPR_PICSR, 0);
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mtspr(SPR_PICSR, 0);
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}
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}
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/* Simulation hook. Must be called every clock cycle to simulate PIC
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/* Simulation hook. Called when interrupts are masked. */
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It does internal functional PIC simulation. */
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void pic_clock(int i)
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inline void pic_clock()
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{
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{
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/* Don't do anything if interrupts not currently enabled or
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/* Don't do anything if interrupts not currently enabled */
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higher priority exception was allready reported */
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if(testsprbits (SPR_SR, SPR_SR_IEE))
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if(mfspr(SPR_PICSR) && testsprbits (SPR_SR, SPR_SR_IEE) && !pending.valid)
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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else
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SCHED_ADD(pic_clock, 0, 1);
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}
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}
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/* WARNING: Don't eaven try and call this function *during* a simulated
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* instruction!! (as in during a read_mem or write_mem callback). except_handle
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* assumes that this is the case, it breaks otherwise. */
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/* Asserts interrupt to the PIC. */
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/* Asserts interrupt to the PIC. */
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void report_interrupt(int line)
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void report_interrupt(int line)
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{
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{
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setsprbits(SPR_PMR, SPR_PMR_DME, 0); /* Disable doze mode */
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setsprbits(SPR_PMR, SPR_PMR_DME, 0); /* Disable doze mode */
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setsprbits(SPR_PMR, SPR_PMR_SME, 0); /* Disable sleep mode */
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setsprbits(SPR_PMR, SPR_PMR_SME, 0); /* Disable sleep mode */
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debug(4, "Asserting interrupt %d (%s).\n", line, getsprbit(SPR_PICMR, line) ? "Unmasked" : "Masked");
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debug(4, "Asserting interrupt %d (%s).\n", line, getsprbit(SPR_PICMR, line) ? "Unmasked" : "Masked");
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if (getsprbit(SPR_PICMR, line) || line < 2)
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if (getsprbit(SPR_PICMR, line) || line < 2) {
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setsprbit(SPR_PICSR, line, 1);
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setsprbit(SPR_PICSR, line, 1);
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/* Don't do anything if interrupts not currently enabled */
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if (testsprbits (SPR_SR, SPR_SR_IEE))
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except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
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else
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/* Interrupts not currently enabled, retry next clock cycle */
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SCHED_ADD(pic_clock, 0, runtime.sim.cycles + 1);
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}
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}
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}
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