| Line 34... |
Line 34... |
End Time = 22701
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End Time = 22701
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OR1K at 200 MHz
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OR1K at 200 MHz
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Microseconds for one run through Dhrystone: 110 us / 20 runs
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Microseconds for one run through Dhrystone: 110 us / 20 runs
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Dhrystones per Second: 181
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Dhrystones per Second: 181
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test0: a test for all instructions and all GPRs. If everything is ok, RESULT == 0xdeadead.
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Simulation:
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# ./sim testbench/test0/test0.or32
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(sim) run 1000000000 hush
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UART 0 RX EOF detected. Shutting down to prevent endless loop.
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MTSPR(0x1234, ffff0012);
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MTSPR(0x1234, 12352af7);
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MTSPR(0x1234, 7ffffffe);
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MTSPR(0x1234, ffffa5a7);
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MTSPR(0x1234, fffff);
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MTSPR(0x1234, 2800);
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MTSPR(0x1234, a);
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MTSPR(0x1234, deaddead);
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syscall exit(0)
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(sim)
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Standard output:
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RESULT: deaddead
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test1: a test for "all" instructions and their combinations. If everything is ok, RESULT == 0xdeadead.
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test1: a test for "all" instructions and their combinations. If everything is ok, RESULT == 0xdeadead.
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Simulation:
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Simulation:
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| Line 66... |
Line 87... |
(sim)
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(sim)
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Standard output:
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Standard output:
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RESULT: deaddead
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RESULT: deaddead
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test2: a test for PIC and TICK timer. All three modes of TICK timer are tested and interrupt is enabled and disabled in PIC. If everything is ok, RESULT == 0xdeadead.
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Simulation:
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# ./sim testbench/test2/test2.or32
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(sim) run 100000000 hush
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...
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...
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...
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MTSPR(0x1234, 178);
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MTSPR(0x1234, 178);
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MTSPR(0x1234, deaddead);
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syscall exit(0)
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(sim)
|
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Standard output:
|
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RESULT: deaddead
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test3: a test of l.sys instruction. Checks all the delay slot issues ind other things. If everything is ok, RESULT == 0xdeadead.
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Simulation:
|
|
# ./sim testbench/test3/test3.or32
|
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(sim) run 1000000 hush
|
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UART 0 RX EOF detected. Shutting down to prevent endless loop.
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Exception 0xc00 (System Call): Iqueue[0].insn_addr: 0xc74 Eff ADDR: 0x0
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pc: 0xc74 pcnext: 0xc78
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MTSPR(0x1234, 1);
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MTSPR(0x1234, 1);
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MTSPR(0x1234, 1c);
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MTSPR(0x1234, 1);
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MTSPR(0x1234, 3);
|
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MTSPR(0x1234, deaddead);
|
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syscall exit(0)
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(sim)
|
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Standard output:
|
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RESULT: deaddead
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test4: a test of SPRs (SPR_VR, SPR_CPUCFGR, SPR_DMMUCFGR, SPR_IMMUCFGR, SPR_DCCFGR, SPR_ICCFGR, SPR_DCFGR, SPR_PCCFGR). If everything is ok, RESULT == 0xdeadead.
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
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|
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Simulation:
|
|
# ./sim testbench/test4/test4.or32
|
|
(sim) run 1000000 hush
|
|
MTSPR(0x1234, 0);
|
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MTSPR(0x1234, e83f);
|
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MTSPR(0x1234, 0);
|
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MTSPR(0x1234, 5);
|
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MTSPR(0x1234, 20);
|
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MTSPR(0x1234, 1d);
|
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MTSPR(0x1234, 1d);
|
|
MTSPR(0x1234, 1d);
|
|
MTSPR(0x1234, 1d);
|
|
MTSPR(0x1234, 8);
|
|
MTSPR(0x1234, 1);
|
|
MTSPR(0x1234, deaddead);
|
|
syscall exit(0)
|
|
(sim)
|
|
|
|
Standard output:
|
|
RESULT: deaddead
|
|
|
compress: UNIX compressed modified not to use libc calls. Should finish with exit(0).
|
compress: UNIX compressed modified not to use libc calls. Should finish with exit(0).
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
|
|
Simulation:
|
Simulation:
|
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