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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [cache.c] - Diff between revs 224 and 322

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Rev 224 Rev 322
Line 31... Line 31...
void jump_and_link(void)
void jump_and_link(void)
{
{
        asm("_jalr:");
        asm("_jalr:");
}
}
 
 
void copy_jalr(unsigned long add)
 
{
 
        memcpy((void *)add, (void *)jr, 8);
 
}
 
 
 
void jump(void)
void jump(void)
{
{
        asm("_jr:");
        asm("_jr:");
        /* Read and increment index */
        /* Read and increment index */
        asm("l.lwz\t\tr3,0(r0)");
        asm("l.lwz\t\tr3,0(r0)");
Line 53... Line 48...
        asm("l.mtspr\t\tr0,r3,0x1234");
        asm("l.mtspr\t\tr0,r3,0x1234");
}
}
 
 
void copy_jr(unsigned long add)
void copy_jr(unsigned long add)
{
{
        memcpy((void *)add, (void *)jr, 24);
        memcpy((void *)add, (void *)&jr, 24);
}
}
 
 
void call(unsigned long add)
void call(unsigned long add)
{
{
        asm("l.jalr\t\t%0" : : "r" (add) : "r11");
        asm("l.jr\t\t%0" : : "r" (add) : "r11");
        asm("l.nop" : :);
        asm("l.nop" : :);
}
}
 
 
void icache_enable(void)
void icache_enable(void)
{
{
Line 105... Line 100...
int dc_test(void)
int dc_test(void)
{
{
        int i;
        int i;
        unsigned long base, add, ul;
        unsigned long base, add, ul;
 
 
        base = ((unsigned long)dummy / (IC_SETS*IC_BLOCK_SIZE)) + IC_SETS*IC_BLOCK_SIZE;
        base = (((unsigned long)&dummy / (IC_SETS*IC_BLOCK_SIZE)) * IC_SETS*IC_BLOCK_SIZE) + IC_SETS*IC_BLOCK_SIZE;
 
 
        dcache_enable();
        dcache_enable();
 
 
        /* Cache miss r */
        /* Cache miss r */
        add = base;
        add = base;
Line 188... Line 183...
int ic_test(void)
int ic_test(void)
{
{
        int i;
        int i;
        unsigned long base, add;
        unsigned long base, add;
 
 
        base = ((unsigned long)dummy / (IC_SETS*IC_BLOCK_SIZE)) + IC_SETS*IC_BLOCK_SIZE;
        base = (((unsigned long)&dummy / (IC_SETS*IC_BLOCK_SIZE)) * IC_SETS*IC_BLOCK_SIZE) + IC_SETS*IC_BLOCK_SIZE;
 
 
        icache_enable();
        icache_enable();
 
 
        /* Copy jr to various location */
        /* Copy jr to various location */
        add = base;
        add = base;
Line 204... Line 199...
 
 
                copy_jr(add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0);
                copy_jr(add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0);
                copy_jr(add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4);
                copy_jr(add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4);
                copy_jr(add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8);
                copy_jr(add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8);
                copy_jr(add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12);
                copy_jr(add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12);
                add += IC_WAYS*IC_SETS*IC_BLOCK_SIZE;
                add += IC_SETS*IC_BLOCK_SIZE;
        }
        }
 
 
        /* Load execution table which starts at address 4 (at address 0 is table index) */
        /* Load execution table which starts at address 4 (at address 0 is table index) */
        add = base;
        add = base;
        for(i = 0; i < IC_WAYS; i++) {
        for(i = 0; i < IC_WAYS; i++) {
                /* Cache miss */
                /* Cache miss */
                REG32(0x40*i + 0x04) = add + 2*IC_BLOCK_SIZE + 4;
                REG32(0x3c*i + 0x04) = add + 2*IC_BLOCK_SIZE + 4;
                REG32(0x40*i + 0x08) = add + 4*IC_BLOCK_SIZE + 8;
                REG32(0x3c*i + 0x08) = add + 4*IC_BLOCK_SIZE + 8;
                REG32(0x40*i + 0x0c) = add + 6*IC_BLOCK_SIZE + 12;
                REG32(0x3c*i + 0x0c) = add + 6*IC_BLOCK_SIZE + 12;
                /* Cache hit/miss */
                /* Cache hit/miss */
                REG32(0x40*i + 0x10) = add;
                REG32(0x3c*i + 0x10) = add;
                REG32(0x40*i + 0x14) = add + (IC_SETS - 0)*IC_BLOCK_SIZE + 0;
                REG32(0x3c*i + 0x14) = add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0;
                REG32(0x40*i + 0x18) = add + 2*IC_BLOCK_SIZE + 4;
                REG32(0x3c*i + 0x18) = add + 2*IC_BLOCK_SIZE + 4;
                REG32(0x40*i + 0x1c) = add + (IC_SETS - 2)*IC_BLOCK_SIZE + 4;
                REG32(0x3c*i + 0x1c) = add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4;
                REG32(0x40*i + 0x20) = add + 4*IC_BLOCK_SIZE + 8;
                REG32(0x3c*i + 0x20) = add + 4*IC_BLOCK_SIZE + 8;
                REG32(0x40*i + 0x24) = add + (IC_SETS - 4)*IC_BLOCK_SIZE + 8;
                REG32(0x3c*i + 0x24) = add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8;
                REG32(0x40*i + 0x28) = add + 6*IC_BLOCK_SIZE + 12;
                REG32(0x3c*i + 0x28) = add + 6*IC_BLOCK_SIZE + 12;
                REG32(0x40*i + 0x2c) = add + (IC_SETS - 6)*IC_BLOCK_SIZE + 12;
                REG32(0x3c*i + 0x2c) = add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12;
                /* Cache hit */
                /* Cache hit */
                REG32(0x40*i + 0x30) = add + (IC_SETS - 0)*IC_BLOCK_SIZE + 0;
                REG32(0x3c*i + 0x30) = add + (IC_SETS - 2)*IC_BLOCK_SIZE + 0;
                REG32(0x40*i + 0x34) = add + (IC_SETS - 2)*IC_BLOCK_SIZE + 4;
                REG32(0x3c*i + 0x34) = add + (IC_SETS - 4)*IC_BLOCK_SIZE + 4;
                REG32(0x40*i + 0x38) = add + (IC_SETS - 4)*IC_BLOCK_SIZE + 8;
                REG32(0x3c*i + 0x38) = add + (IC_SETS - 6)*IC_BLOCK_SIZE + 8;
                REG32(0x40*i + 0x3c) = add + (IC_SETS - 6)*IC_BLOCK_SIZE + 12;
                REG32(0x3c*i + 0x3c) = add + (IC_SETS - 8)*IC_BLOCK_SIZE + 12;
 
 
                add += IC_WAYS*IC_SETS*IC_BLOCK_SIZE;
                add += IC_SETS*IC_BLOCK_SIZE;
        }
        }
 
 
        /* Go home */
        /* Go home */
        REG32(0x40*i) = (unsigned long)jalr;
        REG32(0x3c*i + 4) = (unsigned long)&jalr;
 
 
        /* Initilalize table index */
        /* Initilalize table index */
        REG32(4) = 0;
        REG32(0) = 0;
 
 
        /* Go */
        /* Go */
        call(base);
        call(base);
 
 
        icache_disable();
        icache_disable();
 
 
        return 0xdeaddead;
        return 0xdeaddead;
}
}
 
 
 
 
int main(void)
int main(void)
{
{
        int rc;
        int rc;
 
 
        rc = dc_test();
        rc = dc_test();
Line 258... Line 252...
 
 
        /* Be aware that this test doesn't report result troug report call.
        /* Be aware that this test doesn't report result troug report call.
           It writes to spr 0x1234 directly (in jump function)!!!
           It writes to spr 0x1234 directly (in jump function)!!!
 
 
           This test can not be run on or1ksim. */
           This test can not be run on or1ksim. */
/*      ic_test();
        rc = ic_test();
        report(rc);
        report(rc);
*/
 
        exit(0);
        exit(0);
}
}
 
 
/* just for size calculation */
/* just for size calculation */
void dummy()
void dummy()

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