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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [cache.c] - Diff between revs 621 and 631

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Rev 621	Rev 631
Line 1...	Line 1...
`/* Cache test */`	`/* Cache test */`
`#include "support.h"`	`#include "support.h"`
`#include "spr_defs.h"`	`#include "spr_defs.h"`

`#define OR1KSIM 1`

`#ifdef OR1KSIM`
`#undef UART`	`#undef UART`
`#else`
`#define UART 1`
`#endif`

`#define MEM_RAM 0x00100000`	`#define MEM_RAM 0x00100000`

`/* Number of IC sets (power of 2) */`	`/* Number of IC sets (power of 2) */`
`#define IC_SETS 256`	`#define IC_SETS 256`
Line 362...	Line 357...
`print_str("\n");`	`print_str("\n");`
`#else`	`#else`
`report(rc + 0xdeaddca1);`	`report(rc + 0xdeaddca1);`
`#endif`	`#endif`

`#ifndef OR1KSIM`
`#ifdef UART`	`#ifdef UART`
`print_str("DC invalidate test : ");`	`print_str("DC invalidate test : ");`
`#endif`	`#endif`
`rc = dc_inv_test(MEM_RAM);`	`rc = dc_inv_test(MEM_RAM);`
`ret += rc;`	`ret += rc;`
Line 374...	Line 368...
`print_n(rc + 0x9e8daa91);`	`print_n(rc + 0x9e8daa91);`
`print_str("\n");`	`print_str("\n");`
`#else`	`#else`
`report(rc + 0x9e8daa91);`	`report(rc + 0x9e8daa91);`
`#endif`	`#endif`
`#endif`

`#ifdef UART`	`#ifdef UART`
`print_str("IC test : ");`	`print_str("IC test : ");`
`#endif`	`#endif`
`rc = ic_test();`	`rc = ic_test();`
Line 389...	Line 382...
`#else`	`#else`
`report(rc + 0xdeaddead);`	`report(rc + 0xdeaddead);`
`#endif`	`#endif`


`#ifndef OR1KSIM`
`#ifdef UART`	`#ifdef UART`
`print_str("IC invalidate test : ");`	`print_str("IC invalidate test : ");`
`#endif`	`#endif`
`ic_enable();`	`ic_enable();`
`rc = ic_inv_test();`	`rc = ic_inv_test();`
Line 403...	Line 395...
`print_str("\n");`	`print_str("\n");`
`while(1);`	`while(1);`
`#else`	`#else`
`report(rc + 0xdeadde8f);`	`report(rc + 0xdeadde8f);`
`#endif`	`#endif`
`#endif`


`report(ret + 0xdeaddca1);`	`report(ret + 0x9e8da867);`
`exit(0);`	`exit(0);`

`return 0;`	`return 0;`
`}`	`}`

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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [cache.c] - Diff between revs 621 and 631