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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [mc_dram.h] - Diff between revs 454 and 552

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Line 19... Line 19...
*/
*/
 
 
#ifndef __MC_DRAM_H
#ifndef __MC_DRAM_H
#define __MC_DRAM_H
#define __MC_DRAM_H
 
 
 
/* should configuration be read from MC? */
 
#define  MC_READ_CONF
 
 
/* TEMPLATE SELECTION       */
/* TEMPLATE SELECTION       */
/* change #undef to #define */
/* change #undef to #define */
#define _MC_TEST_TEMPLATE1
#undef  _MC_TEST_TEMPLATE1
#undef  _MC_TEST_TEMPLATE2
#define _MC_TEST_TEMPLATE2
#undef  _MC_TEST_TEMPLATE3
#undef  _MC_TEST_TEMPLATE3
/* ------------------------ */
/* ------------------------ */
 
 
 
 
/* memory configuration that must reflect mcmem.cfg */
/* memory configuration that must reflect sim.cfg */
#define MC_SDRAM_CSMASK 0x02    /* 8 bit mask for 8 chip selects. 1 SDRAM at CS, 0 something else at CS */
#define MC_SDRAM_CSMASK 0x02    /* 8 bit mask for 8 chip selects. 1 SDRAM at CS, 0 something else at CS */
                                /* bits: CS7|CS6|CS5|CS4|CS3|CS2|CS1|CS0 */
                                /* bits: CS7|CS6|CS5|CS4|CS3|CS2|CS1|CS0 */
typedef struct MC_SDRAM_CS
typedef struct MC_SDRAM_CS
{
{
  unsigned long BW;
  unsigned long BW;
Line 39... Line 42...
  unsigned long M;
  unsigned long M;
} MC_SDRAM_CS;
} MC_SDRAM_CS;
 
 
MC_SDRAM_CS mc_sdram_cs[8] = {
MC_SDRAM_CS mc_sdram_cs[8] = {
  { 2,    /* Bus Width : 0 - 8bit, 1 - 16bit, 2 - 32bit */
  { 2,    /* Bus Width : 0 - 8bit, 1 - 16bit, 2 - 32bit */
    0,    /* Memory Size : 0 - 64Mbit, 1 - 128Mbit, 2 - 256Mbit */
    2,    /* Memory Size : 0 - 64Mbit, 1 - 128Mbit, 2 - 256Mbit */
    0x02  /* SELect mask */
    0x20  /* SELect mask */
    },
    },
  { 1, 0, 0x00 },
  { 1, 0, 0x20 },
  { 2, 0, 0x06 },
  { 2, 0, 0x06 },
  { 2, 0, 0x08 },
  { 2, 0, 0x08 },
  { 2, 0, 0x0A },
  { 2, 0, 0x0A },
  { 2, 0, 0x0C },
  { 2, 0, 0x0C },
  { 2, 0, 0x0E },
  { 2, 0, 0x0E },
Line 115... Line 118...
 #define MC_SDRAM_ROWS_5        25/*  256 */
 #define MC_SDRAM_ROWS_5        25/*  256 */
 #define MC_SDRAM_ROWS_6        25/*  1024 */
 #define MC_SDRAM_ROWS_6        25/*  1024 */
 #define MC_SDRAM_ROWS_7        25/*  512 */
 #define MC_SDRAM_ROWS_7        25/*  512 */
 #define MC_SDRAM_ROWS_8        25/*  256 */   
 #define MC_SDRAM_ROWS_8        25/*  256 */   
 
 
 #define MC_SDRAM_ROW_OFF       128
 #define MC_SDRAM_ROW_OFF       5
#endif /*_MC_TEST_TEMPLATE1*/
#endif /*_MC_TEST_TEMPLATE1*/
 
 
/* TEMPLATE 2 */
/* TEMPLATE 2 */
#ifdef _MC_TEST_TEMPLATE2
#ifdef _MC_TEST_TEMPLATE2
 #define MC_SDRAM_FLAGS 0x000004A8LU    /* MC_TEST_ flags... see mc_common.h */
 #define MC_SDRAM_FLAGS 0x000004A8LU    /* MC_TEST_ flags... see mc_common.h */
 #define MC_SDRAM_TESTS 0x00000001LU    /* mask for SDRAM configuration, see conf. test flag defines */
 #define MC_SDRAM_TESTS 0x00000001LU    /* mask for SDRAM configuration, see conf. test flag defines */
 #define MC_SDRAM_ACC   0x00001010LU    /* mask for test types */
 #define MC_SDRAM_ACC   0x00001010LU    /* mask for test types */
 
 
 /* memory sizes*/
 /* memory sizes*/
 #define MC_SDRAM_GROUPSIZE     5
 #define MC_SDRAM_GROUPSIZE     5
                                 /* MAX */
 
 #define MC_SDRAM_ROWSIZE_0     8/*  16 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_1     8/*  16 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_2     8/*   8 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_3     8/*  16 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_4     8/*  16 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_5     8/*  16 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_6     8/*  32 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_7     8/*  32 * 1024 * 4 */
 
 #define MC_SDRAM_ROWSIZE_8     8/*  32 * 1024 * 4 */
 
                                  /*  MAX */
 
 #define MC_SDRAM_ROWS_0        25/*  512 */
 
 #define MC_SDRAM_ROWS_1        25/*  256 */
 
 #define MC_SDRAM_ROWS_2        25/*  256 */
 
 #define MC_SDRAM_ROWS_3        25/*  1024 */
 
 #define MC_SDRAM_ROWS_4        25/*  512 */
 
 #define MC_SDRAM_ROWS_5        25/*  256 */
 
 #define MC_SDRAM_ROWS_6        25/*  1024 */
 
 #define MC_SDRAM_ROWS_7        25/*  512 */
 
 #define MC_SDRAM_ROWS_8        25/*  256 */
 
 
 
 #define MC_SDRAM_ROW_OFF       128
 #define MC_SDRAM_ROWSIZE_0     16 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_1     16 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_2      8 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_3     16 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_4     16 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_5     16 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_6     32 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_7     32 * 1024 * 4
 
 #define MC_SDRAM_ROWSIZE_8     32 * 1024 * 4
 
 
 
 #define MC_SDRAM_ROWS_0         512
 
 #define MC_SDRAM_ROWS_1         256
 
 #define MC_SDRAM_ROWS_2         256
 
 #define MC_SDRAM_ROWS_3        1024
 
 #define MC_SDRAM_ROWS_4         512
 
 #define MC_SDRAM_ROWS_5         256
 
 #define MC_SDRAM_ROWS_6        1024
 
 #define MC_SDRAM_ROWS_7         512
 
 #define MC_SDRAM_ROWS_8         256
 
 
#endif /*_MC_TEST_TEMPLATE2*/
#endif /*_MC_TEST_TEMPLATE2*/
 
 
/* TEMPLATE 3 */
/* TEMPLATE 3 */
#ifdef _MC_TEST_TEMPLATE3
#ifdef _MC_TEST_TEMPLATE3
 #define MC_SDRAM_FLAGS 0x000004A8LU    /* MC_TEST_ flags... see mc_common.h */
 #define MC_SDRAM_FLAGS 0x000004A8LU    /* MC_TEST_ flags... see mc_common.h */
Line 159... Line 161...
 #define MC_SDRAM_ACC   0x00001010LU    /* mask for test types */
 #define MC_SDRAM_ACC   0x00001010LU    /* mask for test types */
 
 
 /* memory sizes*/
 /* memory sizes*/
 #define MC_SDRAM_GROUPSIZE     5
 #define MC_SDRAM_GROUPSIZE     5
                                 /* MAX */
                                 /* MAX */
 #define MC_SDRAM_ROWSIZE_0     8/*  16 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_0     16 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_1     8/*  16 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_1     16 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_2     8/*   8 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_2      8 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_3     8/*  16 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_3     16 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_4     8/*  16 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_4     16 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_5     8/*  16 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_5     16 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_6     8/*  32 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_6     32 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_7     8/*  32 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_7     32 * 1024 * 4
 #define MC_SDRAM_ROWSIZE_8     8/*  32 * 1024 * 4 */
 #define MC_SDRAM_ROWSIZE_8     32 * 1024 * 4
                                  /*  MAX */
                                  /*  MAX */
 #define MC_SDRAM_ROWS_0        25/*  512 */
 #define MC_SDRAM_ROWS_0        10/*  512 */
 #define MC_SDRAM_ROWS_1        25/*  256 */
 #define MC_SDRAM_ROWS_1        10/*  256 */
 #define MC_SDRAM_ROWS_2        25/*  256 */
 #define MC_SDRAM_ROWS_2        10/*  256 */
 #define MC_SDRAM_ROWS_3        25/*  1024 */
 #define MC_SDRAM_ROWS_3        10/*  1024 */
 #define MC_SDRAM_ROWS_4        25/*  512 */
 #define MC_SDRAM_ROWS_4        10/*  512 */
 #define MC_SDRAM_ROWS_5        25/*  256 */
 #define MC_SDRAM_ROWS_5        10/*  256 */
 #define MC_SDRAM_ROWS_6        25/*  1024 */
 #define MC_SDRAM_ROWS_6        10/*  1024 */
 #define MC_SDRAM_ROWS_7        25/*  512 */
 #define MC_SDRAM_ROWS_7        10/*  512 */
 #define MC_SDRAM_ROWS_8        25/*  256 */
 #define MC_SDRAM_ROWS_8        10/*  256 */
 
 
 #define MC_SDRAM_ROW_OFF       128
 
#endif /*_MC_TEST_TEMPLATE3*/
#endif /*_MC_TEST_TEMPLATE3*/
 
 
#endif
#endif
 
 
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