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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [mmu.c] - Diff between revs 457 and 466

Rev 457	Rev 466
Line 254...	Line 254...
`unsigned long ea, ta, tlbtr;`	`unsigned long ea, ta, tlbtr;`
`int set, way = 0;`	`int set, way = 0;`
`int i;`	`int i;`

`/* Get EA that cause the exception */`	`/* Get EA that cause the exception */`
`ea = mfspr (SPR_EPCR_BASE);`	`ea = mfspr (SPR_EEAR_BASE);`

`/* Find TLB set and LRU way */`	`/* Find TLB set and LRU way */`
`set = (ea / PAGE_SIZE) % ITLB_SETS;`	`set = (ea / PAGE_SIZE) % ITLB_SETS;`
`for (i = 0; i < ITLB_WAYS; i++) {`	`for (i = 0; i < ITLB_WAYS; i++) {`
`if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_LRU) == 0) {`	`if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_LRU) == 0) {`
Line 297...	Line 297...
`unsigned long ea;`	`unsigned long ea;`
`int set, way = 0;`	`int set, way = 0;`
`int i;`	`int i;`

`/* Get EA that cause the exception */`	`/* Get EA that cause the exception */`
`ea = mfspr (SPR_EPCR_BASE);`	`ea = mfspr (SPR_EEAR_BASE);`

`/* Find TLB set and way */`	`/* Find TLB set and way */`
`set = (ea / PAGE_SIZE) % ITLB_SETS;`	`set = (ea / PAGE_SIZE) % ITLB_SETS;`
`for (i = 0; i < ITLB_WAYS; i++) {`	`for (i = 0; i < ITLB_WAYS; i++) {`
`if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_VPN) == (ea & SPR_ITLBMR_VPN)) {`	`if ((mfspr (SPR_ITLBMR_BASE(i) + set) & SPR_ITLBMR_VPN) == (ea & SPR_ITLBMR_VPN)) {`