| Line 168... |
Line 168... |
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/* Sys call exception handler */
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/* Sys call exception handler */
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void sys_call_handler (void)
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void sys_call_handler (void)
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{
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{
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/* Set supervisor mode */
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/* Set supervisor mode */
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mtspr (SPR_ESR_BASE, mfspr (SPR_ESR_BASE) | SPR_SR_SUPV);
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mtspr (SPR_ESR_BASE, mfspr (SPR_ESR_BASE) | SPR_SR_SM);
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}
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}
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/* DTLB miss exception handler */
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/* DTLB miss exception handler */
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void dtlb_miss_handler (void)
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void dtlb_miss_handler (void)
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{
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{
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| Line 744... |
Line 744... |
/* Write user */
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/* Write user */
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dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_UWE;
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dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_UWE;
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mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_UWE));
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mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_UWE));
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/* Set user mode */
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/* Set user mode */
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mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SUPV);
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mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SM);
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REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0) = 0xffeeddcc;
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REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0) = 0xffeeddcc;
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ASSERT(dpage_fault_count == 3);
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ASSERT(dpage_fault_count == 3);
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REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4) = 0xbbaa9988;
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REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4) = 0xbbaa9988;
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ASSERT(dpage_fault_count == 3);
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ASSERT(dpage_fault_count == 3);
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| Line 763... |
Line 763... |
/* Read user mode */
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/* Read user mode */
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dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_URE;
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dtlb_val = DTLB_PR_NOLIMIT | SPR_DTLBTR_URE;
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mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_URE));
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mtspr (SPR_DTLBTR_BASE(DTLB_WAYS - 1) + set, ea | (DTLB_PR_NOLIMIT & ~SPR_DTLBTR_URE));
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/* Set user mode */
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/* Set user mode */
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mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SUPV);
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mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SM);
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tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0);
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tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 0);
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ASSERT(dpage_fault_count == 4);
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ASSERT(dpage_fault_count == 4);
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ASSERT(tmp == 0xffeeddcc);
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ASSERT(tmp == 0xffeeddcc);
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tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4);
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tmp = REG32(RAM_START + (RAM_SIZE/2) + (set*PAGE_SIZE) + 4);
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| Line 1104... |
Line 1104... |
/* Execute user */
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/* Execute user */
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itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_UXE;
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itlb_val = SPR_ITLBTR_CI | SPR_ITLBTR_UXE;
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mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + set, ea | (ITLB_PR_NOLIMIT & ~SPR_ITLBTR_UXE));
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mtspr (SPR_ITLBTR_BASE(ITLB_WAYS - 1) + set, ea | (ITLB_PR_NOLIMIT & ~SPR_ITLBTR_UXE));
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/* Set user mode */
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/* Set user mode */
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mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SUPV);
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mtspr (SPR_SR, mfspr (SPR_SR) & ~SPR_SR_SM);
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call (ea);
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call (ea);
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ASSERT(ipage_fault_count == 2);
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ASSERT(ipage_fault_count == 2);
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call (ea + 8);
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call (ea + 8);
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ASSERT(ipage_fault_count == 2);
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ASSERT(ipage_fault_count == 2);
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