URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [mmu.cfg] - Diff between revs 549 and 639

Rev 549	Rev 639
Line 146...	Line 146...
`number of ITLB usage states (2, 3, 4 etc., max is 4)`	`number of ITLB usage states (2, 3, 4 etc., max is 4)`
`*/`	`*/`

`section immu`	`section immu`
`enabled = 1`	`enabled = 1`
`nsets = 32`	`nsets = 64`
`nways = 1`	`nways = 1`
	`ustates = 2`
`pagesize = 8192`	`pagesize = 8192`
`end`	`end`

`/* DMMU SECTION`	`/* DMMU SECTION`

Line 177...	Line 178...
`number of DTLB usage states (2, 3, 4 etc., max is 4)`	`number of DTLB usage states (2, 3, 4 etc., max is 4)`
`*/`	`*/`

`section dmmu`	`section dmmu`
`enabled = 1`	`enabled = 1`
`nsets = 32`	`nsets = 64`
`nways = 1`	`nways = 1`
	`ustates = 2`
`pagesize = 8192`	`pagesize = 8192`
`end`	`end`


`/* IC SECTION`	`/* IC SECTION`
Line 205...	Line 207...
`ustates =`	`ustates =`
`number of IC usage states (2, 3, 4 etc., max is 4)`	`number of IC usage states (2, 3, 4 etc., max is 4)`
`*/`	`*/`

`section ic`	`section ic`
`enabled = 0`	`enabled = 1`
`nsets = 512`	`nsets = 256`
`nways = 1`	`nways = 1`
	`ustates = 2`
`blocksize = 16`	`blocksize = 16`
`end`	`end`

`/* DC SECTION`	`/* DC SECTION`

Line 233...	Line 236...
`ustates =`	`ustates =`
`number of DC usage states (2, 3, 4 etc., max is 4)`	`number of DC usage states (2, 3, 4 etc., max is 4)`
`*/`	`*/`

`section dc`	`section dc`
`enabled = 0`	`enabled = 1`
`nsets = 512`	`nsets = 256`
`nways = 1`	`nways = 1`
	`ustates = 2`
`blocksize = 16`	`blocksize = 16`
`end`	`end`

`/* SIM SECTION`	`/* SIM SECTION`