URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_49/] [or1ksim/] [cpu/] [common/] [stats.c] - Diff between revs 264 and 306

Rev 264	Rev 306
Line 293...	Line 293...
`printf("StaticBP bf: correct %d%% (backward)\n", (mstats.sbp_bf.correct * 100) / SD(mstats.sbp_bf.all));`	`printf("StaticBP bf: correct %d%% (backward)\n", (mstats.sbp_bf.correct * 100) / SD(mstats.sbp_bf.all));`
`printf("BPB: hit %d (correct %d%%), miss %d\n", mstats.bpb.hit, (mstats.bpb.correct * 100) / SD(mstats.bpb.hit), mstats.bpb.miss);`	`printf("BPB: hit %d (correct %d%%), miss %d\n", mstats.bpb.hit, (mstats.bpb.correct * 100) / SD(mstats.bpb.hit), mstats.bpb.miss);`
`} else`	`} else`
`printf("BPB simulation disabled. Enable it to see BPB analysis\n");`	`printf("BPB simulation disabled. Enable it to see BPB analysis\n");`

`if (config.cpu.btic_sim) {`	`if (config.cpu.btic) {`
`printf("BTIC: hit %d(%d%%), miss %d\n", mstats.btic.hit, (mstats.btic.hit * 100) / SD(mstats.btic.hit + mstats.btic.miss), mstats.btic.miss);`	`printf("BTIC: hit %d(%d%%), miss %d\n", mstats.btic.hit, (mstats.btic.hit * 100) / SD(mstats.btic.hit + mstats.btic.miss), mstats.btic.miss);`
`} else`	`} else`
`printf("BTIC simulation disabled. Enabled it to see BTIC analysis\n");`	`printf("BTIC simulation disabled. Enabled it to see BTIC analysis\n");`

`if (testsprbits(SPR_UPR, SPR_UPR_ICP)) {`	`if (testsprbits(SPR_UPR, SPR_UPR_ICP)) {`