Line 165... |
Line 165... |
mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_DME));
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mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_DME));
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mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_IME));
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mtspr(SPR_SR, mfspr(SPR_SR) & ~(SPR_SR_IME));
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_SUPV); /* SUPV mode */
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_SUPV); /* SUPV mode */
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mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_EXR); /* Disable except. */
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mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_EXR); /* Disable except. */
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pc = (unsigned long)except;
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pc = (unsigned long)except;
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/* This has been removed. All exceptions (not just SYSCALL) suffer
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/* This has been removed. All exceptions (not just SYSCALL) suffer
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from the same problem. The solution is to continue just like
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from the same problem. The solution is to continue just like
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the pipeline would, and issue the exception on the next
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the pipeline would, and issue the exception on the next
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Line 178... |
Line 179... |
advantage that a debugger can prevent an exception from
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advantage that a debugger can prevent an exception from
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taking place by resetting the pc. */
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taking place by resetting the pc. */
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#if 0
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#if 0
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/* MM: We do pc update after the execute (in the simulator), so we
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/* MM: We do pc update after the execute (in the simulator), so we
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decrease it by 4 so that next instruction points to first exception
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decrease it by 4 so that next instruction points to first exception
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instruction. */
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instruction. Do NOT comment this out. */
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if (except == EXCEPT_SYSCALL)
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if (except == EXCEPT_SYSCALL)
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pc -= 4;
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pc -= 4;
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#endif
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#endif
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pcnext = pc+4;
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pcnext = pc+4;
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/* Added by CZ 27/05/01 */
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/* Added by CZ 27/05/01 */
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pc_phy = pc; /* An exception always turns off the MMU, so
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pc_phy = pc; /* An exception always turns off the MMU, so
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pc is always pc_phy */
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pc is always pc_phy */
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