| Line 36... |
Line 36... |
mstats.byteadd++;
|
mstats.byteadd++;
|
}
|
}
|
INSTRUCTION (l_sw) {
|
INSTRUCTION (l_sw) {
|
int old_cyc = 0;
|
int old_cyc = 0;
|
IFF (config.cpu.dependstats) current->func_unit = it_store;
|
IFF (config.cpu.dependstats) current->func_unit = it_store;
|
IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;
|
IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
|
set_operand32(0, eval_operand32(1, &breakpoint), &breakpoint);
|
set_operand32(0, eval_operand32(1, &breakpoint), &breakpoint);
|
if (config.cpu.sbuf_len) {
|
if (config.cpu.sbuf_len) {
|
int t = mem_cycles;
|
int t = runtime.sim.mem_cycles;
|
mem_cycles = old_cyc;
|
runtime.sim.mem_cycles = old_cyc;
|
sbuf_store (t - old_cyc);
|
sbuf_store (t - old_cyc);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_sb) {
|
INSTRUCTION (l_sb) {
|
int old_cyc = 0;
|
int old_cyc = 0;
|
IFF (config.cpu.dependstats) current->func_unit = it_store;
|
IFF (config.cpu.dependstats) current->func_unit = it_store;
|
IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;
|
IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
|
set_operand8(0, eval_operand32(1, &breakpoint), &breakpoint);
|
set_operand8(0, eval_operand32(1, &breakpoint), &breakpoint);
|
if (config.cpu.sbuf_len) {
|
if (config.cpu.sbuf_len) {
|
int t = mem_cycles;
|
int t = runtime.sim.mem_cycles;
|
mem_cycles = old_cyc;
|
runtime.sim.mem_cycles = old_cyc;
|
sbuf_store (t- old_cyc);
|
sbuf_store (t- old_cyc);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_sh) {
|
INSTRUCTION (l_sh) {
|
int old_cyc = 0;
|
int old_cyc = 0;
|
IFF (config.cpu.dependstats) current->func_unit = it_store;
|
IFF (config.cpu.dependstats) current->func_unit = it_store;
|
IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;
|
IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
|
set_operand16(0, eval_operand32(1, &breakpoint), &breakpoint);
|
set_operand16(0, eval_operand32(1, &breakpoint), &breakpoint);
|
if (config.cpu.sbuf_len) {
|
if (config.cpu.sbuf_len) {
|
int t = mem_cycles;
|
int t = runtime.sim.mem_cycles;
|
mem_cycles = old_cyc;
|
runtime.sim.mem_cycles = old_cyc;
|
sbuf_store (t - old_cyc);
|
sbuf_store (t - old_cyc);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_lwz) {
|
INSTRUCTION (l_lwz) {
|
unsigned long val;
|
unsigned long val;
|
| Line 167... |
Line 167... |
|
|
IFF (config.cpu.dependstats) current->func_unit = it_arith;
|
IFF (config.cpu.dependstats) current->func_unit = it_arith;
|
temp3 = eval_operand32(2, &breakpoint);
|
temp3 = eval_operand32(2, &breakpoint);
|
temp2 = eval_operand32(1, &breakpoint);
|
temp2 = eval_operand32(1, &breakpoint);
|
temp1 = temp2 / temp3;
|
temp1 = temp2 / temp3;
|
/* cycles += 16; */
|
/* runtime.sim.cycles += 16; */
|
set_operand32(0, set_ov_flag (temp1), &breakpoint);
|
set_operand32(0, set_ov_flag (temp1), &breakpoint);
|
}
|
}
|
INSTRUCTION (l_sll) {
|
INSTRUCTION (l_sll) {
|
int sign = 1;
|
int sign = 1;
|
IFF (config.cpu.dependstats) current->func_unit = it_shift;
|
IFF (config.cpu.dependstats) current->func_unit = it_shift;
|
if ((signed)eval_operand32(1, &breakpoint) < 0)
|
if ((signed)eval_operand32(1, &breakpoint) < 0)
|
sign = -1;
|
sign = -1;
|
/* cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) << eval_operand32(2, &breakpoint)), &breakpoint);
|
set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) << eval_operand32(2, &breakpoint)), &breakpoint);
|
}
|
}
|
INSTRUCTION (l_sra) {
|
INSTRUCTION (l_sra) {
|
unsigned long sign = 0;
|
unsigned long sign = 0;
|
IFF (config.cpu.dependstats) current->func_unit = it_shift;
|
IFF (config.cpu.dependstats) current->func_unit = it_shift;
|
|
|
if ((signed)eval_operand32(1, &breakpoint) < 0)
|
if ((signed)eval_operand32(1, &breakpoint) < 0)
|
sign = -1;
|
sign = -1;
|
/* cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
set_operand32(0, set_ov_flag ((signed)eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);
|
set_operand32(0, set_ov_flag ((signed)eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);
|
}
|
}
|
INSTRUCTION (l_srl) {
|
INSTRUCTION (l_srl) {
|
IFF (config.cpu.dependstats) current->func_unit = it_shift;
|
IFF (config.cpu.dependstats) current->func_unit = it_shift;
|
/* cycles += 2; */
|
/* runtime.sim.cycles += 2; */
|
set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);
|
set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);
|
}
|
}
|
INSTRUCTION (l_bf) {
|
INSTRUCTION (l_bf) {
|
if (config.bpb.enabled) {
|
if (config.bpb.enabled) {
|
int fwd = (eval_operand32(0, &breakpoint) >= pc) ? 1 : 0;
|
int fwd = (eval_operand32(0, &breakpoint) >= pc) ? 1 : 0;
|
| Line 237... |
Line 237... |
next_delay_insn = 1;
|
next_delay_insn = 1;
|
if (config.sim.profile) {
|
if (config.sim.profile) {
|
struct mem_entry *entry;
|
struct mem_entry *entry;
|
struct label_entry *tmp;
|
struct label_entry *tmp;
|
if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
|
if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
|
fprintf (runtime.sim.fprof, "+%08X %08X %08X %s\n", cycles, pc + 8, pcdelay, tmp->name);
|
fprintf (runtime.sim.fprof, "+%08X %08X %08X %s\n", runtime.sim.cycles, pc + 8, pcdelay, tmp->name);
|
else
|
else
|
fprintf (runtime.sim.fprof, "+%08X %08X %08X @%08X\n", cycles, pc + 8, pcdelay, pcdelay);
|
fprintf (runtime.sim.fprof, "+%08X %08X %08X @%08X\n", runtime.sim.cycles, pc + 8, pcdelay, pcdelay);
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_jalr) {
|
INSTRUCTION (l_jalr) {
|
IFF (config.cpu.dependstats) current->func_unit = it_jump;
|
IFF (config.cpu.dependstats) current->func_unit = it_jump;
|
pcdelay = eval_operand32(0, &breakpoint);
|
pcdelay = eval_operand32(0, &breakpoint);
|
| Line 253... |
Line 253... |
INSTRUCTION (l_jr) {
|
INSTRUCTION (l_jr) {
|
IFF (config.cpu.dependstats) current->func_unit = it_jump;
|
IFF (config.cpu.dependstats) current->func_unit = it_jump;
|
pcdelay = eval_operand32(0, &breakpoint);
|
pcdelay = eval_operand32(0, &breakpoint);
|
next_delay_insn = 1;
|
next_delay_insn = 1;
|
if (config.sim.profile)
|
if (config.sim.profile)
|
fprintf (runtime.sim.fprof, "-%08X %08X\n", cycles, pcdelay);
|
fprintf (runtime.sim.fprof, "-%08X %08X\n", runtime.sim.cycles, pcdelay);
|
}
|
}
|
INSTRUCTION (l_rfe) {
|
INSTRUCTION (l_rfe) {
|
IFF (config.cpu.dependstats) current->func_unit = it_exception;
|
IFF (config.cpu.dependstats) current->func_unit = it_exception;
|
pcnext = mfspr(SPR_EPCR_BASE);
|
pcnext = mfspr(SPR_EPCR_BASE);
|
mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
|
mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
|
| Line 272... |
Line 272... |
case NOP_EXIT:
|
case NOP_EXIT:
|
printf("exit(%d)\n", evalsim_reg32 (3));
|
printf("exit(%d)\n", evalsim_reg32 (3));
|
if (config.debug.gdb_enabled)
|
if (config.debug.gdb_enabled)
|
set_stall_state (1);
|
set_stall_state (1);
|
else
|
else
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
break;
|
break;
|
case NOP_PRINTF:
|
case NOP_PRINTF:
|
stackaddr = evalsim_reg32(4);
|
stackaddr = evalsim_reg32(4);
|
simprintf(stackaddr, evalsim_reg32(3));
|
simprintf(stackaddr, evalsim_reg32(3));
|
debug(5, "simprintf %x\n", stackaddr);
|
debug(5, "simprintf %x\n", stackaddr);
|
| Line 386... |
Line 386... |
IFF (config.cpu.dependstats) current->func_unit = it_move;
|
IFF (config.cpu.dependstats) current->func_unit = it_move;
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
mtspr(regno, value);
|
mtspr(regno, value);
|
else {
|
else {
|
printf("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
|
printf("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_mfspr) {
|
INSTRUCTION (l_mfspr) {
|
unsigned long regno = eval_operand32(1, &breakpoint) + eval_operand32(2, &breakpoint);
|
unsigned long regno = eval_operand32(1, &breakpoint) + eval_operand32(2, &breakpoint);
|
unsigned long value = mfspr(regno);
|
unsigned long value = mfspr(regno);
|
| Line 403... |
Line 403... |
if (mfspr(SPR_SR) & SPR_SR_SM)
|
if (mfspr(SPR_SR) & SPR_SR_SM)
|
set_operand32(0, value, &breakpoint);
|
set_operand32(0, value, &breakpoint);
|
else {
|
else {
|
set_operand32(0, 0, &breakpoint);
|
set_operand32(0, 0, &breakpoint);
|
printf("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
|
printf("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
|
cont_run = 0;
|
runtime.sim.cont_run = 0;
|
}
|
}
|
}
|
}
|
INSTRUCTION (l_sys) {
|
INSTRUCTION (l_sys) {
|
except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));
|
except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));
|
}
|
}
|
