URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 611 |
Rev 729 |
Line 43... |
Line 43... |
|
|
/* Simulation hook. Must be called every clock cycle to simulate PIC
|
/* Simulation hook. Must be called every clock cycle to simulate PIC
|
It does internal functional PIC simulation. */
|
It does internal functional PIC simulation. */
|
inline void pic_clock()
|
inline void pic_clock()
|
{
|
{
|
unsigned long picsr;
|
|
unsigned long sr;
|
|
|
|
/* From Sections 16.3 & 16.4, bits 0 & 1 are reserved */
|
|
picsr = mfspr(SPR_PICSR);
|
|
sr = mfspr(SPR_SR);
|
|
|
|
/* Don't do anything if interrupts not currently enabled or
|
/* Don't do anything if interrupts not currently enabled or
|
higher priority exception was allready reported */
|
higher priority exception was allready reported */
|
if(((sr & SPR_SR_IEE) != SPR_SR_IEE) || pending.valid)
|
if(testsprbits (SPR_SR, SPR_SR_IEE) && mfspr(SPR_PICSR) && !pending.valid)
|
return;
|
|
|
|
if(picsr)
|
|
except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
|
except_handle(EXCEPT_INT, mfspr(SPR_EEAR_BASE));
|
}
|
}
|
|
|
/* Asserts interrupt to the PIC. */
|
/* Asserts interrupt to the PIC. */
|
void report_interrupt(int line)
|
void report_interrupt(int line)
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.