| Line 79... |
Line 79... |
config.dmmu.hitdelay = 0;
|
config.dmmu.hitdelay = 0;
|
config.dmmu.missdelay = 0;
|
config.dmmu.missdelay = 0;
|
|
|
/* IC & DC */
|
/* IC & DC */
|
config.ic.enabled = 0;
|
config.ic.enabled = 0;
|
config.ic.tagtype = CT_PHYSICAL/*CT_VIRTUAL*/;
|
|
config.ic.hitdelay = 0;
|
config.ic.hitdelay = 0;
|
config.ic.missdelay = 0;
|
config.ic.missdelay = 0;
|
|
config.ic.nways = 0;
|
|
config.ic.nsets = 0;
|
|
config.ic.ustates = 0;
|
config.dc.enabled = 0;
|
config.dc.enabled = 0;
|
config.dc.tagtype = CT_PHYSICAL/*CT_VIRTUAL*/;
|
|
config.dc.load_hitdelay = 0;
|
config.dc.load_hitdelay = 0;
|
config.dc.load_missdelay = 0;
|
config.dc.load_missdelay = 0;
|
|
config.dc.nways = 0;
|
|
config.dc.nsets = 0;
|
|
config.dc.ustates = 0;
|
config.dc.store_hitdelay = 0;
|
config.dc.store_hitdelay = 0;
|
config.dc.store_missdelay = 0;
|
config.dc.store_missdelay = 0;
|
|
|
/* Memory Controller */
|
/* Memory Controller */
|
config.mc.enabled = 0;
|
config.mc.enabled = 0;
|
| Line 297... |
Line 301... |
|
|
printf("Machine initialization...\n");
|
printf("Machine initialization...\n");
|
generate_time_pretty (temp, config.sim.clkcycle_ps);
|
generate_time_pretty (temp, config.sim.clkcycle_ps);
|
printf("Clock cycle: %s\n", temp);
|
printf("Clock cycle: %s\n", temp);
|
if (testsprbits(SPR_UPR, SPR_UPR_DCP))
|
if (testsprbits(SPR_UPR, SPR_UPR_DCP))
|
printf("Data cache tag: %s\n", config.dc.tagtype == CT_VIRTUAL ? "virtual" : "physical");
|
printf("Data cache present.\n");
|
else
|
else
|
printf("No data cache.\n");
|
printf("No data cache.\n");
|
if (testsprbits(SPR_UPR, SPR_UPR_ICP))
|
if (testsprbits(SPR_UPR, SPR_UPR_ICP))
|
printf("Insn cache tag: %s\n", config.ic.tagtype == CT_VIRTUAL ? "virtual" : "physical");
|
printf("Insn cache tag present.\n");
|
else
|
else
|
printf("No instruction cache.\n");
|
printf("No instruction cache.\n");
|
if (config.bpb.enabled)
|
if (config.bpb.enabled)
|
printf("BPB simulation on.\n");
|
printf("BPB simulation on.\n");
|
else
|
else
|
| Line 373... |
Line 377... |
void ic_enabled ();
|
void ic_enabled ();
|
void ic_nsets ();
|
void ic_nsets ();
|
void ic_nways ();
|
void ic_nways ();
|
void ic_blocksize ();
|
void ic_blocksize ();
|
void ic_ustates ();
|
void ic_ustates ();
|
void ic_tagtype ();
|
|
void dc_enabled ();
|
void dc_enabled ();
|
void dc_nsets ();
|
void dc_nsets ();
|
void dc_nways ();
|
void dc_nways ();
|
void dc_blocksize ();
|
void dc_blocksize ();
|
void dc_ustates ();
|
void dc_ustates ();
|
void dc_tagtype ();
|
|
|
|
unsigned long tempL;
|
unsigned long tempL;
|
unsigned long tempUL;
|
unsigned long tempUL;
|
char tempS[STR_SIZE];
|
char tempS[STR_SIZE];
|
|
|
| Line 529... |
Line 531... |
{13, "enabled", "=%i", ic_enabled, (void *)(&tempL), 0},
|
{13, "enabled", "=%i", ic_enabled, (void *)(&tempL), 0},
|
{13, "nsets", "=%i", ic_nsets, (void *)(&tempL), 0},
|
{13, "nsets", "=%i", ic_nsets, (void *)(&tempL), 0},
|
{13, "nways", "=%i", ic_nways, (void *)(&tempL), 0},
|
{13, "nways", "=%i", ic_nways, (void *)(&tempL), 0},
|
{13, "blocksize", "=%i", ic_blocksize, (void *)(&tempL), 0},
|
{13, "blocksize", "=%i", ic_blocksize, (void *)(&tempL), 0},
|
{13, "ustates", "=%i", ic_ustates, (void *)(&tempL), 0},
|
{13, "ustates", "=%i", ic_ustates, (void *)(&tempL), 0},
|
{13, "tagtype", "=%s ", ic_tagtype, (void *)(&tempS), 0},
|
|
{13, "missdelay", "=%i", NULL, (void *)(&config.ic.missdelay), 0},
|
{13, "missdelay", "=%i", NULL, (void *)(&config.ic.missdelay), 0},
|
{13, "hitdelay", "=%i", NULL, (void *)(&config.ic.hitdelay), 0},
|
{13, "hitdelay", "=%i", NULL, (void *)(&config.ic.hitdelay), 0},
|
|
|
{14, "enabled", "=%i", dc_enabled, (void *)(&tempL), 0},
|
{14, "enabled", "=%i", dc_enabled, (void *)(&tempL), 0},
|
{14, "nsets", "=%i", dc_nsets, (void *)(&tempL), 0},
|
{14, "nsets", "=%i", dc_nsets, (void *)(&tempL), 0},
|
{14, "nways", "=%i", dc_nways, (void *)(&tempL), 0},
|
{14, "nways", "=%i", dc_nways, (void *)(&tempL), 0},
|
{14, "blocksize", "=%i", dc_blocksize, (void *)(&tempL), 0},
|
{14, "blocksize", "=%i", dc_blocksize, (void *)(&tempL), 0},
|
{14, "ustates", "=%i", dc_ustates, (void *)(&tempL), 0},
|
{14, "ustates", "=%i", dc_ustates, (void *)(&tempL), 0},
|
{14, "tagtype", "=%s ", dc_tagtype, (void *)(&tempS), 0},
|
|
{14, "load_missdelay", "=%i", NULL, (void *)(&config.dc.load_missdelay), 0},
|
{14, "load_missdelay", "=%i", NULL, (void *)(&config.dc.load_missdelay), 0},
|
{14, "load_hitdelay", "=%i", NULL, (void *)(&config.dc.load_hitdelay), 0},
|
{14, "load_hitdelay", "=%i", NULL, (void *)(&config.dc.load_hitdelay), 0},
|
{14, "store_missdelay", "=%i", NULL, (void *)(&config.dc.store_missdelay), 0},
|
{14, "store_missdelay", "=%i", NULL, (void *)(&config.dc.store_missdelay), 0},
|
{14, "store_hitdelay", "=%i", NULL, (void *)(&config.dc.store_hitdelay), 0},
|
{14, "store_hitdelay", "=%i", NULL, (void *)(&config.dc.store_hitdelay), 0},
|
|
|
| Line 981... |
Line 981... |
config.ic.ustates = tempL;
|
config.ic.ustates = tempL;
|
else
|
else
|
ERROR("invalid USTATE.");
|
ERROR("invalid USTATE.");
|
}
|
}
|
|
|
void ic_tagtype () {
|
|
if (strcmp (tempS, "none") == 0)
|
|
config.ic.tagtype = CT_NONE;
|
|
else if (strcmp (tempS, "physical") == 0)
|
|
config.ic.tagtype = CT_PHYSICAL;
|
|
else if (strcmp (tempS, "virtual") == 0)
|
|
config.ic.tagtype = CT_VIRTUAL;
|
|
else {
|
|
char tmp[200];
|
|
sprintf (tmp, "invalid cache type '%s'.\n", tempS);
|
|
ERROR(tmp);
|
|
}
|
|
}
|
|
|
|
void dc_enabled () {
|
void dc_enabled () {
|
config.dc.enabled = tempL;
|
config.dc.enabled = tempL;
|
setsprbits (SPR_UPR, SPR_UPR_DCP, tempL & 1);
|
setsprbits (SPR_UPR, SPR_UPR_DCP, tempL & 1);
|
}
|
}
|
|
|
| Line 1031... |
Line 1017... |
config.dc.ustates = tempL;
|
config.dc.ustates = tempL;
|
else
|
else
|
ERROR("invalid USTATE.");
|
ERROR("invalid USTATE.");
|
}
|
}
|
|
|
void dc_tagtype () {
|
|
if (strcmp (tempS, "none") == 0)
|
|
config.dc.tagtype = CT_NONE;
|
|
else if (strcmp (tempS, "physical") == 0)
|
|
config.dc.tagtype = CT_PHYSICAL;
|
|
else if (strcmp (tempS, "virtual") == 0)
|
|
config.dc.tagtype = CT_VIRTUAL;
|
|
else {
|
|
char tmp[200];
|
|
sprintf (tmp, "invalid cache type '%s'.\n", tempS);
|
|
ERROR(tmp);
|
|
}
|
|
}
|
|
|
|
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead.
|
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead.
|
The syntax of script file is:
|
The syntax of script file is:
|
param = value
|
param = value
|
section x
|
section x
|
data
|
data
|
| Line 1293... |
Line 1265... |
|
|
fprintf (f, " dmmu:{enabled:%i, nways:%i, nsets:%i, pagesize:%i, entrysize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
|
fprintf (f, " dmmu:{enabled:%i, nways:%i, nsets:%i, pagesize:%i, entrysize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
|
config.dmmu.enabled, config.dmmu.nways, config.dmmu.nsets, config.dmmu.pagesize, config.dmmu.entrysize, config.dmmu.ustates,
|
config.dmmu.enabled, config.dmmu.nways, config.dmmu.nsets, config.dmmu.pagesize, config.dmmu.entrysize, config.dmmu.ustates,
|
config.dmmu.missdelay, config.dmmu.hitdelay);
|
config.dmmu.missdelay, config.dmmu.hitdelay);
|
|
|
fprintf (f, " ic:{enabled:%i, tagtype:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
|
fprintf (f, " ic:{enabled:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i, missdelay:%i, hitdelay:%i},\n",
|
config.ic.enabled, config.ic.tagtype, config.ic.nways, config.ic.nsets, config.ic.blocksize, config.ic.ustates,
|
config.ic.enabled, config.ic.nways, config.ic.nsets, config.ic.blocksize, config.ic.ustates,
|
config.ic.missdelay, config.ic.hitdelay);
|
config.ic.missdelay, config.ic.hitdelay);
|
|
|
fprintf (f, " dc:{enabled:%i, tagtype:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i,\n"
|
fprintf (f, " dc:{enabled:%i, nways:%i, nsets:%i, blocksize:%i, ustates:%i,\n"
|
" load_missdelay:%i, load_hitdelay:%i, store_missdelay:%i, store_hitdelay:%i},\n",
|
" load_missdelay:%i, load_hitdelay:%i, store_missdelay:%i, store_hitdelay:%i},\n",
|
config.dc.enabled, config.dc.tagtype, config.dc.nways, config.dc.nsets, config.dc.blocksize, config.dc.ustates,
|
config.dc.enabled, config.dc.nways, config.dc.nsets, config.dc.blocksize, config.dc.ustates,
|
config.dc.load_missdelay, config.dc.load_hitdelay, config.dc.store_missdelay, config.dc.store_hitdelay);
|
config.dc.load_missdelay, config.dc.load_hitdelay, config.dc.store_missdelay, config.dc.store_hitdelay);
|
|
|
fprintf (f, " bpb:{enabled:%i, sbp_bnf_fwd:%i, sbp_bf_fwd:%i, btic:%i, missdelay:%i, hitdelay:%i},\n",
|
fprintf (f, " bpb:{enabled:%i, sbp_bnf_fwd:%i, sbp_bf_fwd:%i, btic:%i, missdelay:%i, hitdelay:%i},\n",
|
config.bpb.enabled, config.bpb.sbp_bnf_fwd, config.bpb.sbp_bf_fwd, config.bpb.btic, config.bpb.missdelay, config.bpb.hitdelay);
|
config.bpb.enabled, config.bpb.sbp_bnf_fwd, config.bpb.sbp_bf_fwd, config.bpb.btic, config.bpb.missdelay, config.bpb.hitdelay);
|
|
|
