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Line 31... |
extern unsigned long pctemp;
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extern unsigned long pctemp;
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/* Handle OR1K exceptions. */
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/* Handle OR1K exceptions. */
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void except_handle(int except, unsigned long ea)
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void except_handle(int except, unsigned long ea)
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{
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{
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unsigned long pc_saved;
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#if ONLY_VIRTUAL_MACHINE
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#if ONLY_VIRTUAL_MACHINE
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printf("WARNING: Exception 0x%x (%s): ", except, EXCEPT_NAME(except));
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printf("WARNING: Exception 0x%x (%s): ", except, EXCEPT_NAME(except));
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printf("Insn ADDR: 0x%x Eff ADDR: 0x%x\n", iqueue[0].insn_addr, ea);
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printf("Insn ADDR: 0x%x Eff ADDR: 0x%x\n", iqueue[0].insn_addr, ea);
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printf("No exception processing while ONLY_VIRTUAL_MACHINE is defined.\n");
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printf("No exception processing while ONLY_VIRTUAL_MACHINE is defined.\n");
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#else
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#else
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Line 46... |
return;
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return;
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}
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}
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printf("Exception 0x%x (%s): ", except, EXCEPT_NAME(except));
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printf("Exception 0x%x (%s): ", except, EXCEPT_NAME(except));
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printf("Insn ADDR: 0x%x Eff ADDR: 0x%x\n", iqueue[0].insn_addr, ea);
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printf("Insn ADDR: 0x%x Eff ADDR: 0x%x\n", iqueue[0].insn_addr, ea);
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pc_saved = (iqueue[0].insn_addr & ~0x1) | (mfspr(SPR_SR) & SPR_SR_SUPV);
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mtspr(SPR_EPCR_BASE, iqueue[0].insn_addr);
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mtspr(SPR_EPCR_BASE, iqueue[0].insn_addr);
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mtspr(SPR_EEAR_BASE, ea);
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mtspr(SPR_EEAR_BASE, ea);
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_SUPV); /* SUPV mode */
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mtspr(SPR_SR, mfspr(SPR_SR) | SPR_SR_SUPV); /* SUPV mode */
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mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_EIR); /* Disable ints. */
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mtspr(SPR_SR, mfspr(SPR_SR) & ~SPR_SR_EIR); /* Disable ints. */
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pc = (unsigned long)except;
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pc = (unsigned long)except;
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