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| Rev 884 |
Rev 886 |
| Line 99... |
Line 99... |
printf ("SUSPEND: PMR[SUME] bit was set.\n");
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printf ("SUSPEND: PMR[SUME] bit was set.\n");
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runtime.sim.cont_run = 0;
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runtime.sim.cont_run = 0;
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}
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}
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break;
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break;
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default:
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default:
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/* Mask reseved bits in DTLBMR and DTLBMR registers */
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if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {
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if((regno & 0xff) < 0x80)
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sprs[regno] = ((value / (config.dmmu.pagesize * config.dmmu.nsets)) *
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config.dmmu.pagesize * config.dmmu.nsets) |
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(value & (SPR_DTLBMR_V | SPR_DTLBMR_PL1 | SPR_DTLBMR_CID | SPR_DTLBMR_LRU));
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else
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sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) |
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(value & (SPR_DTLBTR_CC | SPR_DTLBTR_CI | SPR_DTLBTR_WBC | SPR_DTLBTR_WOM |
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SPR_DTLBTR_A | SPR_DTLBTR_D | SPR_DTLBTR_URE | SPR_DTLBTR_UWE | SPR_DTLBTR_SRE |
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SPR_DTLBTR_SWE));
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}
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/* Mask reseved bits in ITLBMR and ITLBMR registers */
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if ( (regno >= SPR_ITLBMR_BASE(0)) && (regno < SPR_ITLBTR_LAST(3))) {
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if((regno & 0xff) < 0x80)
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sprs[regno] = ((value / (config.immu.pagesize * config.immu.nsets)) *
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config.immu.pagesize * config.immu.nsets) |
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(value & (SPR_ITLBMR_V | SPR_ITLBMR_PL1 | SPR_ITLBMR_CID | SPR_ITLBMR_LRU));
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else
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sprs[regno] = ((value / config.immu.pagesize) * config.immu.pagesize) |
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(value & (SPR_ITLBTR_CC | SPR_ITLBTR_CI | SPR_ITLBTR_WBC | SPR_ITLBTR_WOM |
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SPR_ITLBTR_A | SPR_ITLBTR_D | SPR_ITLBTR_SXE | SPR_ITLBTR_UXE));
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}
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/* Links to GPRS */
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/* Links to GPRS */
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if(regno >= 0x0400 && regno < 0x0420) {
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if(regno >= 0x0400 && regno < 0x0420) {
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extern unsigned long reg[32];
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extern unsigned long reg[32];
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reg[regno - 0x0400] = value;
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reg[regno - 0x0400] = value;
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}
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}
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