URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [cache/] [dcache_model.c] - Diff between revs 992 and 997

Rev 992	Rev 997
Line 47...	Line 47...
`} dc[MAX_DC_SETS];`	`} dc[MAX_DC_SETS];`

`void dc_info()`	`void dc_info()`
`{`	`{`
`if (!testsprbits(SPR_UPR, SPR_UPR_DCP)) {`	`if (!testsprbits(SPR_UPR, SPR_UPR_DCP)) {`
`printf("DCache not implemented. Set UPR[DCP].\n");`	`PRINTF("DCache not implemented. Set UPR[DCP].\n");`
`return;`	`return;`
`}`	`}`

`printf("Data cache %dKB: ", config.dc.nsets * config.dc.blocksize * config.dc.nways / 1024);`	`PRINTF("Data cache %dKB: ", config.dc.nsets * config.dc.blocksize * config.dc.nways / 1024);`
`printf("%d ways, %d sets, block size %d bytes\n", config.dc.nways, config.dc.nsets, config.dc.blocksize);`	`PRINTF("%d ways, %d sets, block size %d bytes\n", config.dc.nways, config.dc.nsets, config.dc.blocksize);`
`}`	`}`

`/* First check if data is already in the cache and if it is:`	`/* First check if data is already in the cache and if it is:`
`- increment DC read hit stats,`	`- increment DC read hit stats,`
`- set 'lru' at this way to config.dc.ustates - 1 and`	`- set 'lru' at this way to config.dc.ustates - 1 and`