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[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [support/] [dumpverilog.c] - Diff between revs 75 and 85

Rev 75	Rev 85
Line 1...	Line 1...
`/* dumpverilog.c -- Dumps memory region as Verilog representation`	`/* dumpverilog.c -- Dumps memory region as Verilog representation`
	`or as hex code`
`Copyright (C) 2000 Damjan Lampret, lampret@opencores.org`	`Copyright (C) 2000 Damjan Lampret, lampret@opencores.org`

`This file is part of OpenRISC 1000 Architectural Simulator.`	`This file is part of OpenRISC 1000 Architectural Simulator.`

`This program is free software; you can redistribute it and/or modify`	`This program is free software; you can redistribute it and/or modify`
Line 99...	Line 100...

`}`	`}`
`printf(OR1K_MEM_VERILOG_FOOTER);`	`printf(OR1K_MEM_VERILOG_FOOTER);`
`}`	`}`

`No newline at end of file`	`No newline at end of file`

	`void dumphex(unsigned int from, unsigned int to)`
	`{`
	`unsigned int i, done = 0;`

	`for(i = from; i < to && i < (MEMORY_START + MEMORY_LEN); i++) {`
	`if (mem[i].insn) {`
	`printf("%.2x%.2x", mem[i].data, mem[i+1].data);`
	`printf("%.2x%.2x\n", mem[i+2].data, mem[i+3].data);`
	`i += (insn_len(mem[i].insn->insn) - 1);`
	`} else`
	`{`
	`printf("%.2x\n", (unsigned char)mem[i].data);`
	`}`
	`done = 1;`
	`}`

	`if (done) {`
	`return;`
	`}`

	`/* this needs to be fixed */`

	`for(i = from; i < to; i++) {`
	`printf("%.2x", (unsigned char)evalsim_mem32(i));`
	`}`
	`}`

`No newline at end of file`	`No newline at end of file`