OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [support/] [simprintf.c] - Diff between revs 44 and 75

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 44 Rev 75
Line 31... Line 31...
#include <arch.h>
#include <arch.h>
 
 
/* Length of printf format string */
/* Length of printf format string */
#define FMTLEN 2000
#define FMTLEN 2000
 
 
void simprintf(unsigned long stackaddr, unsigned long regparam)
char fmtstr[FMTLEN];
 
 
 
char *simgetstr(unsigned long stackaddr, unsigned long regparam)
{
{
        unsigned long fmtaddr;
        unsigned long fmtaddr;
        char fmtstr[FMTLEN];
 
        FILE *f;
        FILE *f;
        int i;
        int i;
 
 
#if STACK_ARGS
#if STACK_ARGS
        fmtaddr = eval_mem32(stackaddr);
        fmtaddr = eval_mem32(stackaddr);
Line 53... Line 54...
                if (i == FMTLEN - 1)
                if (i == FMTLEN - 1)
                        break;
                        break;
        }
        }
        fmtstr[i] = '\0';
        fmtstr[i] = '\0';
 
 
 
        return fmtstr;
 
}
 
 
 
void simprintf(unsigned long stackaddr, unsigned long regparam)
 
{
 
        unsigned long fmtaddr;
 
        FILE *f;
 
        int i = 0;
 
 
 
        simgetstr(stackaddr, regparam);
 
 
        debug("simprintf: stackaddr: 0x%.8lx", stackaddr);
        debug("simprintf: stackaddr: 0x%.8lx", stackaddr);
        if ((f = fopen("stdout.txt", "a+"))) {
        if ((f = fopen("stdout.txt", "a+"))) {
                unsigned long arg;
                unsigned long arg;
                unsigned long argaddr;
                unsigned long argaddr;
                unsigned char regstr[5];
                unsigned char regstr[5];

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.