URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [support/] [simprintf.c] - Diff between revs 823 and 884

Rev 823	Rev 884
Line 72...	Line 72...
`unsigned long argaddr;`	`unsigned long argaddr;`
`unsigned char regstr[5];`	`unsigned char regstr[5];`
`char *fmtstrend;`	`char *fmtstrend;`
`char *fmtstrpart = fmtstr;`	`char *fmtstrpart = fmtstr;`
`int tee_exe_log;`	`int tee_exe_log;`
`extern long instructions;`

`#if STACK_ARGS`	`#if STACK_ARGS`
`argaddr = stackaddr;`	`argaddr = stackaddr;`
`#else`	`#else`
`argaddr = 3;`	`argaddr = 3;`
`#endif`	`#endif`
`tee_exe_log = (config.sim.exe_log && (config.sim.exe_log_type == EXE_LOG_SOFTWARE \|\| config.sim.exe_log_type == EXE_LOG_SIMPLE)`	`tee_exe_log = (config.sim.exe_log && (config.sim.exe_log_type == EXE_LOG_SOFTWARE \|\| config.sim.exe_log_type == EXE_LOG_SIMPLE)`
`&& config.sim.exe_log_start <= instructions && (config.sim.exe_log_end <= 0 \|\| instructions <= config.sim.exe_log_end));`	`&& config.sim.exe_log_start <= runtime.cpu.instructions && (config.sim.exe_log_end <= 0 \|\| runtime.cpu.instructions <= config.sim.exe_log_end));`

`if (tee_exe_log)`	`if (tee_exe_log)`
`fprintf (runtime.sim.fexe_log, "SIMPRINTF: ");`	`fprintf (runtime.sim.fexe_log, "SIMPRINTF: ");`
`debug(6, "simprintf: %s\n", fmtstrpart);`	`debug(6, "simprintf: %s\n", fmtstrpart);`
`while(strlen(fmtstrpart)) {`	`while(strlen(fmtstrpart)) {`