| Line 91... |
Line 91... |
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
/* Starts the tick timer. This function is called by a write to ttcr spr register */
|
/* Starts the tick timer. This function is called by a write to ttcr spr register */
|
void spr_write_ttcr (unsigned long value)
|
void spr_write_ttcr (uorreg_t value)
|
{
|
{
|
unsigned mode = (ttmr & SPR_TTMR_M) >> 30;
|
unsigned mode = (ttmr & SPR_TTMR_M) >> 30;
|
TRACE("set ttcr = %"PRIxREG"\n", value);
|
TRACE("set ttcr = %"PRIxREG"\n", value);
|
ttcr = value;
|
ttcr = value;
|
/* Remove previous if it exists */
|
/* Remove previous if it exists */
|
| Line 107... |
Line 107... |
SCHED_ADD(tick_job, (void *)0, (ttmr & SPR_TTMR_PERIOD) - ttcr);
|
SCHED_ADD(tick_job, (void *)0, (ttmr & SPR_TTMR_PERIOD) - ttcr);
|
cycles_start = runtime.sim.cycles - ttcr;
|
cycles_start = runtime.sim.cycles - ttcr;
|
}
|
}
|
}
|
}
|
|
|
void spr_write_ttmr (unsigned long value)
|
void spr_write_ttmr (uorreg_t value)
|
{
|
{
|
TRACE("set ttmr = %"PRIxREG"\n", value);
|
TRACE("set ttmr = %"PRIxREG"\n", value);
|
ttmr = value;
|
ttmr = value;
|
/* Handle the modes properly. */
|
/* Handle the modes properly. */
|
switch((ttmr & SPR_TTMR_M) >> 30) {
|
switch((ttmr & SPR_TTMR_M) >> 30) {
|
| Line 137... |
Line 137... |
case 3: /* Timer keeps running -- do nothing*/
|
case 3: /* Timer keeps running -- do nothing*/
|
break;
|
break;
|
}
|
}
|
}
|
}
|
|
|
unsigned long spr_read_ttcr ()
|
uorreg_t spr_read_ttcr (void)
|
{
|
{
|
TRACE("read ttcr %lli\n", runtime.sim.cycles - cycles_start);
|
TRACE("read ttcr %lli\n", runtime.sim.cycles - cycles_start);
|
return runtime.sim.cycles - cycles_start;
|
return runtime.sim.cycles - cycles_start;
|
}
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
