URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [tick/] [tick.c] - Diff between revs 133 and 167

Rev 133	Rev 167
Line 25...	Line 25...
`#include <stdio.h>`	`#include <stdio.h>`
`#include <string.h>`	`#include <string.h>`

`#include "tick.h"`	`#include "tick.h"`
`#include "../cpu/or1k/spr_defs.h"`	`#include "../cpu/or1k/spr_defs.h"`
	`#include "../cpu/or1k/sprs.h"`
`#include "pic.h"`	`#include "pic.h"`

`/* For mode 10 only: timer stops until we write into TTCR. */`	`/* For mode 10 only: timer stops until we write into TTCR. */`
`int tt_stopped = 0;`	`int tt_stopped = 0;`

Line 58...	Line 59...
`if (ttmr & SPR_TTMR_IE) {`	`if (ttmr & SPR_TTMR_IE) {`
`setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);`	`setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);`
`report_interrupt(INT_TICK);`	`report_interrupt(INT_TICK);`
`}`	`}`

`if (ttmr & SPR_TTMR_M == 1) {`	`if ((ttmr & SPR_TTMR_M) >> 30 == 1) {`
`/* Mode 01: Restart timer. */`	`/* Mode 01: Restart timer. */`
`ttcr = 0;`	`ttcr = 0;`
`mtspr(SPR_TTCR, ttcr);`	`mtspr(SPR_TTCR, ttcr);`
`return;`	`return;`
`} else if (ttmr & SPR_TTMR_M == 2) {`	`} else if ((ttmr & SPR_TTMR_M) >> 30 == 2) {`
`/* Mode 10: Temporarly stop timer. */`	`/* Mode 10: Temporarly stop timer. */`
`tt_stopped = 1;`	`tt_stopped = 1;`
`return;`	`return;`
`}`	`}`
`}`	`}`