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| Rev 167 |
Rev 189 |
| Line 25... |
Line 25... |
#include <stdio.h>
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#include <stdio.h>
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#include <string.h>
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#include <string.h>
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#include "tick.h"
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#include "tick.h"
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#include "../cpu/or1k/spr_defs.h"
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#include "../cpu/or1k/spr_defs.h"
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#include "../cpu/or1k/sprs.h"
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#include "pic.h"
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#include "pic.h"
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#include "sprs.h"
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/* For mode 10 only: timer stops until we write into TTCR. */
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/* For mode 10 only: timer stops until we write into TTCR. */
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int tt_stopped = 0;
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int tt_stopped = 0;
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/* Reset. It initializes TTCR register. */
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/* Reset. It initializes TTCR register. */
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Line 54... |
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if (!(ttmr & SPR_TTMR_M) || tt_stopped)
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if (!(ttmr & SPR_TTMR_M) || tt_stopped)
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return;
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return;
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if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
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if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
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int mode = (ttmr & SPR_TTMR_M) >> 30; /* CZ 04/09/01 */
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if (ttmr & SPR_TTMR_IE) {
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if (ttmr & SPR_TTMR_IE) {
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setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
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setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
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report_interrupt(INT_TICK);
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report_interrupt(INT_TICK);
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}
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}
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if ((ttmr & SPR_TTMR_M) >> 30 == 1) {
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/* Handle the modes properly.. CZ 04/09/01 */
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/* Mode 01: Restart timer. */
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switch(mode)
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{
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case 0: /* Timer is disabled */
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tt_stopped = 1;
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break;
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case 1: /* Timer should auto restart */
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ttcr = 0;
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ttcr = 0;
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mtspr(SPR_TTCR, ttcr);
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mtspr(SPR_TTCR, ttcr);
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return;
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break;
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} else if ((ttmr & SPR_TTMR_M) >> 30 == 2) {
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case 2: /* Pause the timer */
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/* Mode 10: Temporarly stop timer. */
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tt_stopped = 1;
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tt_stopped = 1;
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return;
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break;
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case 3: /* Timer keeps running */
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break;
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}
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}
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}
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}
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if (!tt_stopped)
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if (!tt_stopped)
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ttcr++;
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ttcr++;
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mtspr(SPR_TTCR, ttcr);
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mtspr(SPR_TTCR, ttcr);
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