URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_53/] [or1ksim/] [cuc/] [verilog.c] - Diff between revs 902 and 906

Rev 902	Rev 906
Line 61...	Line 61...
`{`	`{`
`unsigned long op = f->INSN(ref).op[j];`	`unsigned long op = f->INSN(ref).op[j];`
`unsigned long opt = f->INSN(ref).opt[j];`	`unsigned long opt = f->INSN(ref).opt[j];`
`switch (opt & ~OPT_DEST) {`	`switch (opt & ~OPT_DEST) {`
`case OPT_NONE: assert (0); break;`	`case OPT_NONE: assert (0); break;`
`case OPT_CONST: sprintf (s, "32'h%x", op); break;`	`case OPT_CONST: if (f->INSN(ref).type & IT_COND) {`
	`assert (op == 0 \|\| op == 1);`
	`sprintf (s, "1'b%x", op);`
	`} else sprintf (s, "32'h%x", op);`
	`break;`
`case OPT_REGISTER:`	`case OPT_REGISTER:`
`if (opt & OPT_DEST) sprintf (s, "t%x_%x", REF_BB(ref), REF_I(ref));`	`if (opt & OPT_DEST) sprintf (s, "t%x_%x", REF_BB(ref), REF_I(ref));`
`else sprintf (s, "r%i_%c", op, opt & OPT_DEST ? 'o' : 'i');`	`else sprintf (s, "r%i_%c", op, opt & OPT_DEST ? 'o' : 'i');`
`break;`	`break;`
`case OPT_REF: sprintf (s, "t%x_%x", REF_BB(op), REF_I(op)); break;`	`case OPT_REF: sprintf (s, "t%x_%x", REF_BB(op), REF_I(op)); break;`