URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_58/] [or1ksim/] [cpu/] [or1k/] [sprs.h] - Diff between revs 728 and 997

Rev 728	Rev 997
Line 57...	Line 57...
`return reg[regno - 0x0400];`	`return reg[regno - 0x0400];`
`else if (regno < MAX_SPRS)`	`else if (regno < MAX_SPRS)`
`return sprs[regno];`	`return sprs[regno];`
`}`	`}`
`if (config.sim.verbose)`	`if (config.sim.verbose)`
`printf ("WARNING: read out of SPR range %08X\n", regno);`	`PRINTF ("WARNING: read out of SPR range %08X\n", regno);`
`return 0;`	`return 0;`
`}`	`}`

`/* Set specific SPR bit(s) identified by mask. */`	`/* Set specific SPR bit(s) identified by mask. */`
`static inline void`	`static inline void`
Line 77...	Line 77...
`if ((mask >> m) & 0x1) {`	`if ((mask >> m) & 0x1) {`
`shifted \|= ((value >> v) & 0x1) << m;`	`shifted \|= ((value >> v) & 0x1) << m;`
`v++;`	`v++;`
`}`	`}`

`/* printf("oldvalue %x setsprbits(%x, %x, %x) shifted %x", regvalue, regno, mask, value, shifted); */`	`/* PRINTF("oldvalue %x setsprbits(%x, %x, %x) shifted %x", regvalue, regno, mask, value, shifted); */`
`mtspr(regno, (regvalue & ~mask) \| shifted);`	`mtspr(regno, (regvalue & ~mask) \| shifted);`
`}`	`}`

`/* Get specific SPR bit(s) identified by mask. */`	`/* Get specific SPR bit(s) identified by mask. */`
`static inline unsigned long`	`static inline unsigned long`