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https://opencores.org/ocsvn/or1k/or1k/trunk
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Rev 970 |
Rev 997 |
Line 139... |
Line 139... |
void mc_reset()
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void mc_reset()
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{
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{
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struct dev_memarea *mem_dev = dev_list;
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struct dev_memarea *mem_dev = dev_list;
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if (config.mc.enabled) {
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if (config.mc.enabled) {
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printf("Resetting memory controller.\n");
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PRINTF("Resetting memory controller.\n");
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memset(&mc, 0, sizeof(struct mc));
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memset(&mc, 0, sizeof(struct mc));
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mc.poc = config.mc.POC;
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mc.poc = config.mc.POC;
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/* Set CS0 */
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/* Set CS0 */
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Line 176... |
Line 176... |
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void mc_status()
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void mc_status()
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{
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{
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int i;
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int i;
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printf( "\nMemory Controller at 0x%08X:\n", config.mc.baseaddr );
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PRINTF( "\nMemory Controller at 0x%08X:\n", config.mc.baseaddr );
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printf( "POC: 0x%08X\n", mc.poc );
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PRINTF( "POC: 0x%08X\n", mc.poc );
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printf( "BAS: 0x%08X\n", mc.ba_mask );
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PRINTF( "BAS: 0x%08X\n", mc.ba_mask );
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printf( "CSR: 0x%08X\n", mc.csr );
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PRINTF( "CSR: 0x%08X\n", mc.csr );
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for (i=0; i<N_CE; i++) {
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for (i=0; i<N_CE; i++) {
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printf( "CE %02d - CSC: 0x%08X TMS: 0x%08X\n", i, mc.csc[i], mc.tms[i]);
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PRINTF( "CE %02d - CSC: 0x%08X TMS: 0x%08X\n", i, mc.csc[i], mc.tms[i]);
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}
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}
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}
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}
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