OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_61/] [or1ksim/] [bpb/] [branch_predict.c] - Diff between revs 28 and 102

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 28 Rev 102
Line 31... Line 31...
#include <stdarg.h>
#include <stdarg.h>
 
 
#include "branch_predict.h"
#include "branch_predict.h"
#include "abstract.h"
#include "abstract.h"
#include "stats.h"
#include "stats.h"
 
#include "sim-config.h"
 
 
/* Branch prediction buffer */
/* Branch prediction buffer */
 
 
/* Length of BPB */
/* Length of BPB */
#define BPB_LEN 64
#define BPB_LEN 64
Line 59... Line 60...
        } way[BPB_WAYS];
        } way[BPB_WAYS];
} bpb[BPB_LEN];
} bpb[BPB_LEN];
 
 
void bpb_info()
void bpb_info()
{
{
 
        if (!config.bp.bpb_sim) {
 
                printf("BPB not simulated. Check -bpb option.\n");
 
                return;
 
        }
 
 
        printf("BPB %d bytes: ", BPB_LEN * BPB_WAYS * (BPB_PSTATES + BPB_USTATES) / 8);
        printf("BPB %d bytes: ", BPB_LEN * BPB_WAYS * (BPB_PSTATES + BPB_USTATES) / 8);
        printf("%d ways, %d sets, %d bits/prediction\n", BPB_WAYS, BPB_LEN, BPB_PSTATES + BPB_USTATES);
        printf("%d ways, %d sets, %d bits/prediction\n", BPB_WAYS, BPB_LEN, BPB_PSTATES + BPB_USTATES);
}
}
 
 
/* First check if branch is already in the cache and if it is:
/* First check if branch is already in the cache and if it is:
Line 83... Line 89...
void bpb_update(unsigned long addr, int taken)
void bpb_update(unsigned long addr, int taken)
{
{
        int entry, way = -1;
        int entry, way = -1;
        int i;
        int i;
 
 
 
        /* BPB simulation enabled/disabled. */
 
        if (!config.bp.bpb_sim)
 
                return;
 
 
        /* Calc entry. */
        /* Calc entry. */
        entry = addr % BPB_LEN;
        entry = addr % BPB_LEN;
 
 
        /* Scan all ways and try to find our addr. */
        /* Scan all ways and try to find our addr. */
        for (i = 0; i < BPB_WAYS; i++)
        for (i = 0; i < BPB_WAYS; i++)
Line 154... Line 164...
        } way[BTIC_WAYS];
        } way[BTIC_WAYS];
} btic[BTIC_LEN];
} btic[BTIC_LEN];
 
 
void btic_info()
void btic_info()
{
{
 
        if (!config.bp.btic_sim) {
 
                printf("BTIC not simulated. Check -btic option.\n");
 
                return;
 
        }
 
 
        printf("BTIC %d bytes: ", BTIC_LEN * BTIC_WAYS * (BTIC_USTATES + BTIC_BLOCKSIZE * 8) / 8);
        printf("BTIC %d bytes: ", BTIC_LEN * BTIC_WAYS * (BTIC_USTATES + BTIC_BLOCKSIZE * 8) / 8);
        printf("%d ways, %d sets, %d bits/target\n", BTIC_WAYS, BTIC_LEN, BTIC_USTATES + BTIC_BLOCKSIZE * 8);
        printf("%d ways, %d sets, %d bits/target\n", BTIC_WAYS, BTIC_LEN, BTIC_USTATES + BTIC_BLOCKSIZE * 8);
}
}
 
 
/* First check if target addr is already in the cache and if it is:
/* First check if target addr is already in the cache and if it is:
Line 175... Line 190...
void btic_update(unsigned long targetaddr)
void btic_update(unsigned long targetaddr)
{
{
        int entry, way = -1;
        int entry, way = -1;
        int i;
        int i;
 
 
 
        /* BTIC simulation enabled/disabled. */
 
        if (!config.bp.btic_sim)
 
                return;
 
 
        /* Calc entry. */
        /* Calc entry. */
        entry = targetaddr % BTIC_LEN;
        entry = targetaddr % BTIC_LEN;
 
 
        /* Scan all ways and try to find our addr. */
        /* Scan all ways and try to find our addr. */
        for (i = 0; i < BTIC_WAYS; i++)
        for (i = 0; i < BTIC_WAYS; i++)

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.