| Line 39... |
Line 39... |
#include "arch.h"
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#include "arch.h"
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#include "abstract.h"
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#include "abstract.h"
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#include "parse.h"
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#include "parse.h"
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#include "sprs.h"
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#include "sprs.h"
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#include "gdb.h"
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#include "gdb.h"
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#include "../cpu/or1k/except.h"
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#include "except.h"
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#include "opcode/or32.h"
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#include "opcode/or32.h"
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#include "debug.h"
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|
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DevelopmentInterface development;
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DevelopmentInterface development;
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|
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/* External STALL signal to debug interface */
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/* External STALL signal to debug interface */
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int in_reset = 0;
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int in_reset = 0;
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| Line 72... |
Line 73... |
void du_clock()
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void du_clock()
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{
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{
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watchpoints=0;
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watchpoints=0;
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};
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};
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|
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inline int CheckDebugUnit(DebugUnitAction action, unsigned long udata)
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int CheckDebugUnit(DebugUnitAction action, unsigned long udata)
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{
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{
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/* Do not stop, if we have debug module disabled or during reset */
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/* Do not stop, if we have debug module disabled or during reset */
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if(!config.debug.enabled || in_reset)
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if(!config.debug.enabled || in_reset)
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return 0;
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return 0;
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|
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/* If we're single stepping, always stop */
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/* If we're single stepping, always stop */
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if(action == DebugInstructionFetch && testsprbits (SPR_DMR1, SPR_DMR1_ST))
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if(action == DebugInstructionFetch && testsprbits (SPR_DMR1, SPR_DMR1_ST))
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return 1;
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return 1;
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|
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// is any watchpoint enabled to generate a break or count? If not, ignore
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/* is any watchpoint enabled to generate a break or count? If not, ignore */
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if(mfspr(SPR_DMR2) & (SPR_DMR2_WGB|SPR_DMR2_AWTC))
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if(mfspr(SPR_DMR2) & (SPR_DMR2_WGB|SPR_DMR2_AWTC))
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return calculate_watchpoints(action, udata);
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return calculate_watchpoints(action, udata);
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|
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return 0;
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return 0;
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}
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}
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| Line 212... |
Line 213... |
{
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{
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case JTAG_CHAIN_DEBUG_UNIT:
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case JTAG_CHAIN_DEBUG_UNIT:
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*data = mfspr (address);
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*data = mfspr (address);
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debug (2, "READ (%08x) = %08x\n", address, *data);
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debug (2, "READ (%08x) = %08x\n", address, *data);
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if (runtime.sim.fspr_log) {
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", address, *data);
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fprintf(runtime.sim.fspr_log, "Read from SPR : [%08X] -> [%08lX]\n",
|
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address, *data);
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}
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}
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break;
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break;
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case JTAG_CHAIN_TRACE:
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case JTAG_CHAIN_TRACE:
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*data = 0; /* Scan chain not yet implemented */
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*data = 0; /* Scan chain not yet implemented */
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break;
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break;
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| Line 244... |
Line 246... |
switch(current_scan_chain)
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switch(current_scan_chain)
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{
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{
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case JTAG_CHAIN_DEBUG_UNIT:
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case JTAG_CHAIN_DEBUG_UNIT:
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debug (2, "WRITE (%08x) = %08x\n", address, data);
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debug (2, "WRITE (%08x) = %08x\n", address, data);
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if (runtime.sim.fspr_log) {
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Write to SPR : [%08lX] <- [%08lX]\n", address, data);
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fprintf(runtime.sim.fspr_log, "Write to SPR : [%08X] <- [%08lX]\n",
|
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address, data);
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}
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}
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mtspr(address, data);
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mtspr(address, data);
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break;
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break;
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case JTAG_CHAIN_TRACE:
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case JTAG_CHAIN_TRACE:
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err = JTAG_PROXY_ACCESS_EXCEPTION;
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err = JTAG_PROXY_ACCESS_EXCEPTION;
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| Line 336... |
Line 339... |
fflush(stdout);
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fflush(stdout);
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#endif
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#endif
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return err;
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return err;
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}
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}
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|
|
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/* Gets development interface register */
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int get_devint_reg(unsigned int address,unsigned long *data)
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int get_devint_reg(unsigned int address,unsigned long *data)
|
{
|
{
|
int err = 0;
|
int err = 0;
|
unsigned long value = 0;
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unsigned long value = 0;
|
|
|
| Line 387... |
Line 391... |
simmem_write_word(address, data);
|
simmem_write_word(address, data);
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}
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}
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return err;
|
return err;
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}
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}
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|
|
|
/* Reads from bus address */
|
int debug_get_mem(unsigned int address,unsigned long *data)
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int debug_get_mem(unsigned int address,unsigned long *data)
|
{
|
{
|
int err = 0;
|
int err = 0;
|
if(!verify_memoryarea(address))
|
if(!verify_memoryarea(address))
|
err = JTAG_PROXY_INVALID_ADDRESS;
|
err = JTAG_PROXY_INVALID_ADDRESS;
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| Line 407... |
Line 412... |
{
|
{
|
int result = 0;
|
int result = 0;
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unsigned long dsr = mfspr (SPR_DSR);
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unsigned long dsr = mfspr (SPR_DSR);
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unsigned long drr = mfspr (SPR_DRR);
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unsigned long drr = mfspr (SPR_DRR);
|
|
|
&debug_ignore_exception;
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|
|
|
#if DEBUG_JTAG
|
#if DEBUG_JTAG
|
PRINTF ("dsr 0x%08x drr 0x%08x \n", dsr, drr);
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PRINTF ("dsr 0x%08x drr 0x%08x \n", dsr, drr);
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#endif
|
#endif
|
|
|
switch(except) {
|
switch(except) {
|
