| Line 263... |
Line 263... |
}
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}
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}
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}
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if (start_set < end_set) PRINTF("\n");
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if (start_set < end_set) PRINTF("\n");
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}
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}
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No newline at end of file
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No newline at end of file
|
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/*---------------------------------------------------[ DMMU configuration ]---*/
|
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void dmmu_enabled(union param_val val, void *dat)
|
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{
|
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setsprbits (SPR_UPR, SPR_UPR_DMP, val.int_val ? 1 : 0);
|
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config.dmmu.enabled = val.int_val;
|
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}
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void dmmu_nsets(union param_val val, void *dat)
|
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{
|
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if (is_power2(val.int_val) && val.int_val <= 256)
|
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config.dmmu.nsets = val.int_val;
|
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else
|
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CONFIG_ERROR("value of power of two and lower or equal than 256 expected.");
|
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}
|
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|
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void dmmu_nways(union param_val val, void *dat)
|
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{
|
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if (val.int_val >= 1 && val.int_val <= 4)
|
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config.dmmu.nways = val.int_val;
|
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else
|
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CONFIG_ERROR("value 1, 2, 3 or 4 expected.");
|
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}
|
|
|
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void dmmu_pagesize(union param_val val, void *dat)
|
|
{
|
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if (is_power2(val.int_val))
|
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config.dmmu.pagesize = val.int_val;
|
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else
|
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CONFIG_ERROR("value of power of two expected.");
|
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}
|
|
|
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void dmmu_entrysize(union param_val val, void *dat)
|
|
{
|
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if (is_power2(val.int_val))
|
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config.dmmu.entrysize = val.int_val;
|
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else
|
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CONFIG_ERROR("value of power of two expected.");
|
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}
|
|
|
|
void dmmu_ustates(union param_val val, void *dat)
|
|
{
|
|
if (val.int_val >= 2 && val.int_val <= 4)
|
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config.dmmu.ustates = val.int_val;
|
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else
|
|
CONFIG_ERROR("invalid USTATE.");
|
|
}
|
|
|
|
void dmmu_missdelay(union param_val val, void *dat)
|
|
{
|
|
config.dmmu.missdelay = val.int_val;
|
|
}
|
|
|
|
void dmmu_hitdelay(union param_val val, void *dat)
|
|
{
|
|
config.immu.hitdelay = val.int_val;
|
|
}
|
|
|
|
void reg_dmmu_sec(void)
|
|
{
|
|
struct config_section *sec = reg_config_sec("dmmu", NULL, NULL);
|
|
|
|
reg_config_param(sec, "enabled", paramt_int, dmmu_enabled);
|
|
reg_config_param(sec, "nsets", paramt_int, dmmu_nsets);
|
|
reg_config_param(sec, "nways", paramt_int, dmmu_nways);
|
|
reg_config_param(sec, "pagesize", paramt_int, dmmu_pagesize);
|
|
reg_config_param(sec, "entrysize", paramt_int, dmmu_entrysize);
|
|
reg_config_param(sec, "ustates", paramt_int, dmmu_ustates);
|
|
reg_config_param(sec, "missdelay", paramt_int, dmmu_missdelay);
|
|
reg_config_param(sec, "hitdelay", paramt_int, dmmu_hitdelay);
|
|
}
|
|
|
No newline at end of file
|
No newline at end of file
|
