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[/] [or1k/] [tags/] [nog_patch_61/] [or1ksim/] [toplevel.c] - Diff between revs 518 and 535

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Rev 518 Rev 535
Line 49... Line 49...
#include "gdbcomm.h"
#include "gdbcomm.h"
#include "debug_unit.h"
#include "debug_unit.h"
#include "coff.h"
#include "coff.h"
 
 
/* CVS revision number. */
/* CVS revision number. */
const char rcsrev[] = "$Revision: 1.57 $";
const char rcsrev[] = "$Revision: 1.58 $";
 
 
/* Continuos run versus single step tracing switch. */
/* Continuos run versus single step tracing switch. */
int cont_run;
int cont_run;
 
 
/* History of execution */
/* History of execution */
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help()
help()
{
{
  printf("q      - quit simulator\n");
  printf("q      - quit simulator\n");
  printf("r      - display all registers\n");
  printf("r      - display all registers\n");
  printf("t      - execute next instruction\n");
  printf("t      - execute next instruction\n");
  printf("run <cycles> [<hush>]  - execute <cycles> instructions, no reg dump if hush\n");
  printf("run <instructions> [<hush>]  - execute <instruction> instructions, no reg dump if hush\n");
  printf("pr <r> <value>     - patch register <r> with <value>\n");
  printf("pr <r> <value>     - patch register <r> with <value>\n");
  printf("dm <fromaddr> [<toaddr>] - display memory from <fromaddr> to <toaddr>\n");
  printf("dm <fromaddr> [<toaddr>] - display memory from <fromaddr> to <toaddr>\n");
  printf("de <fromaddr> [<toaddr>] - debug insn memory\n");
  printf("de <fromaddr> [<toaddr>] - debug insn memory\n");
  printf("pm <addr> <value>  - patch memory location <addr> with <value>\n");
  printf("pm <addr> <value>  - patch memory location <addr> with <value>\n");
  printf("pc <value>     - patch PC register with <value>\n");
  printf("pc <value>     - patch PC register with <value>\n");
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}
}
 
 
/* Display info about various modules */
/* Display info about various modules */
void sim_info () {
void sim_info () {
  sprs_status();
  sprs_status();
 
  printf ("\n");
  memory_table_status ();
  memory_table_status ();
  itlb_status(-1);
  if (config.immu.enabled) itlb_status(-1);
  dtlb_status(-1);
  if (config.dmmu.enabled) dtlb_status(-1);
  ic_info();
  if (config.ic.enabled) ic_info();
  dc_info();
  if (config.dc.enabled) dc_info();
 
 
  if (config.cpu.bpb) bpb_info();
  if (config.cpu.bpb) bpb_info();
  if (config.cpu.btic) btic_info();
  if (config.cpu.btic) btic_info();
 
 
  if (config.uarts_enabled) uart_status();
  if (config.uarts_enabled) uart_status();
  if (config.dmas_enabled) dma_status();
  if (config.dmas_enabled) dma_status();
  if (config.ethernets_enabled) eth_status();
  if (config.ethernets_enabled) eth_status();
  if (config.gpios_enabled) gpio_status();
  if (config.gpios_enabled) gpio_status();
}
}
Line 603... Line 605...
      printf("%s: Unknown command.\n", linestr);
      printf("%s: Unknown command.\n", linestr);
 
 
    /* MM: 'run -1' means endless execution.  */
    /* MM: 'run -1' means endless execution.  */
    while(cont_run != 0) {
    while(cont_run != 0) {
      int debug_slowdown = DEBUG_SLOWDOWN;
      int debug_slowdown = DEBUG_SLOWDOWN;
      extern int cycle_delay;  /* Added by CZ 27/05/01. Set during exception. */
 
 
 
      if (cpu_stalled) {
      if (cpu_stalled) {
        printf ("!");
        printf ("!");
        if(GDB_ENABLED) {
        if(GDB_ENABLED) {
          BlockJTAG();
          BlockJTAG();
Line 617... Line 618...
        continue;
        continue;
      }
      }
 
 
      if (!testsprbits(SPR_PMR, SPR_PMR_DME | SPR_PMR_SME)) {
      if (!testsprbits(SPR_PMR, SPR_PMR_DME | SPR_PMR_SME)) {
        pic_clock();
        pic_clock();
        if(cycle_delay <= 0) {
 
          if (cont_run > 0) cont_run--;
          if (cont_run > 0) cont_run--;
          if(fetch()) {
          if(fetch()) {
            printf ("Breakpoint hit.\n");
            printf ("Breakpoint hit.\n");
            cont_run = 0; /* memory breakpoint encountered */
            cont_run = 0; /* memory breakpoint encountered */
            break;
            break;
          }
          }
 
 
          decode_execute(&iqueue[0]);
          decode_execute(&iqueue[0]);
          update_pc();
          update_pc();
          analysis();
          analysis();
          if (!hush)
          if (!hush)
            dumpreg();
            dumpreg();
        } else
 
          cycle_delay--;
 
 
 
        dc_clock();
        dc_clock();
        ic_clock();
        ic_clock();
        if (!testsprbits(SPR_PMR, SPR_PMR_SME)) tick_clock();
        if (!testsprbits(SPR_PMR, SPR_PMR_SME)) tick_clock();
      }
      }

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