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https://opencores.org/ocsvn/or1k/or1k/trunk
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Rev 600 |
Rev 642 |
Line 219... |
Line 219... |
switch(current_scan_chain)
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switch(current_scan_chain)
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{
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{
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case JTAG_CHAIN_DEBUG_UNIT:
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case JTAG_CHAIN_DEBUG_UNIT:
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*data = mfspr (address);
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*data = mfspr (address);
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debug (2, "READ (%08x) = %08x\n", address, *data);
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debug (2, "READ (%08x) = %08x\n", address, *data);
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", address, value);
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}
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break;
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break;
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case JTAG_CHAIN_TRACE:
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case JTAG_CHAIN_TRACE:
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*data = 0; /* Scan chain not yet implemented */
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*data = 0; /* Scan chain not yet implemented */
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err = 0;
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err = 0;
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break;
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break;
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Line 249... |
Line 252... |
#endif
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#endif
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switch(current_scan_chain)
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switch(current_scan_chain)
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{
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{
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case JTAG_CHAIN_DEBUG_UNIT:
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case JTAG_CHAIN_DEBUG_UNIT:
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debug (2, "WRITE (%08x) = %08x\n", address, data);
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debug (2, "WRITE (%08x) = %08x\n", address, data);
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if (runtime.sim.fspr_log) {
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fprintf(runtime.sim.fspr_log, "Write to SPR : [%08lX] <- [%08lX]\n", address, value);
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}
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mtspr(address, data);
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mtspr(address, data);
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break;
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break;
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case JTAG_CHAIN_TRACE:
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case JTAG_CHAIN_TRACE:
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err = JTAG_PROXY_ACCESS_EXCEPTION;
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err = JTAG_PROXY_ACCESS_EXCEPTION;
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break;
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break;
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