URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_64/] [or1ksim/] [cache/] [icache_model.c] - Diff between revs 26 and 76

Rev 26	Rev 76
Line 33...	Line 33...
`#include "stats.h"`	`#include "stats.h"`

`/* Instruction cache */`	`/* Instruction cache */`

`/* Number of IC sets (power of 2) */`	`/* Number of IC sets (power of 2) */`
`#define IC_SETS 128`	`#define IC_SETS 512`

`/* Block size in bytes (1, 2, 4, 8, 16, 32 etc.) */`	`/* Block size in bytes (1, 2, 4, 8, 16, 32 etc.) */`
`#define IC_BLOCK_SIZE 16`	`#define IC_BLOCK_SIZE 16`

`/* Number of IC ways (1, 2, 3 etc.). */`	`/* Number of IC ways (1, 2, 3 etc.). */`
Line 68...	Line 68...
`- find lru way and entry and replace old tag with tag of the 'fetchaddr'`	`- find lru way and entry and replace old tag with tag of the 'fetchaddr'`
`- set 'lru' with IC_USTATES - 1 and decrement 'lru' of other`	`- set 'lru' with IC_USTATES - 1 and decrement 'lru' of other`
`ways unless they have reached 0`	`ways unless they have reached 0`
`*/`	`*/`

`void ic_simulate(unsigned long fetchaddr)`	`void ic_simulate_fetch(unsigned long fetchaddr)`
`{`	`{`
`int set, way = -1;`	`int set, way = -1;`
`int i;`	`int i;`
`unsigned long tagaddr;`	`unsigned long tagaddr;`