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[/] [or1k/] [tags/] [nog_patch_65/] [or1ksim/] [peripheral/] [eth.c] - Diff between revs 725 and 744

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Rev 725 Rev 744
Line 146... Line 146...
        }
        }
 
 
        /* stay in this state if (TXEN && !READY) */
        /* stay in this state if (TXEN && !READY) */
        break;
        break;
    case ETH_TXSTATE_READFIFO:
    case ETH_TXSTATE_READFIFO:
 
#if 1
        if ( eth->tx.bytes_sent < eth->tx.packet_length ) {
        if ( eth->tx.bytes_sent < eth->tx.packet_length ) {
            read_word = eval_mem32(eth->tx.bytes_sent + eth->tx.bd_addr, &breakpoint);
            read_word = eval_mem32(eth->tx.bytes_sent + eth->tx.bd_addr, &breakpoint);
            eth->tx_buff[eth->tx.bytes_sent]   = (unsigned char)(read_word >> 24);
            eth->tx_buff[eth->tx.bytes_sent]   = (unsigned char)(read_word >> 24);
            eth->tx_buff[eth->tx.bytes_sent+1] = (unsigned char)(read_word >> 16);
            eth->tx_buff[eth->tx.bytes_sent+1] = (unsigned char)(read_word >> 16);
            eth->tx_buff[eth->tx.bytes_sent+2] = (unsigned char)(read_word >> 8);
            eth->tx_buff[eth->tx.bytes_sent+2] = (unsigned char)(read_word >> 8);
            eth->tx_buff[eth->tx.bytes_sent+3] = (unsigned char)(read_word);
            eth->tx_buff[eth->tx.bytes_sent+3] = (unsigned char)(read_word);
            eth->tx.bytes_sent += 4;
            eth->tx.bytes_sent += 4;
        }
        }
 
#else
 
        if ( eth->tx.bytes_sent < eth->tx.packet_length ) {
 
            eth->tx_buff[eth->tx.bytes_sent] = eval_mem8(eth->tx.bytes_sent + eth->tx.bd_addr, &breakpoint);
 
            eth->tx.bytes_sent += 1;
 
        }
 
#endif
        else {
        else {
            debug (3, "TX - entering state TRANSMIT\n");
            debug (3, "TX - entering state TRANSMIT\n");
            eth->tx.state = ETH_TXSTATE_TRANSMIT;
            eth->tx.state = ETH_TXSTATE_TRANSMIT;
        }
        }
        break;
        break;
Line 274... Line 281...
        else if (!TEST_FLAG( eth->regs.moder, ETH_MODER, RXEN)) {
        else if (!TEST_FLAG( eth->regs.moder, ETH_MODER, RXEN)) {
          debug (3, "RX - entering state IDLE\n");
          debug (3, "RX - entering state IDLE\n");
          eth->rx.state = ETH_RXSTATE_IDLE;
          eth->rx.state = ETH_RXSTATE_IDLE;
        }
        }
        else {
        else {
            nread = recv(eth->rtx_sock, eth->rx_buff, ETH_MAXPL, MSG_PEEK | MSG_DONTWAIT);
            nread = recv(eth->rtx_sock, eth->rx_buff, ETH_MAXPL, /*MSG_PEEK | */MSG_DONTWAIT);
            if (nread > 0) {
            if (nread > 0) {
                SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, BUSY);
                SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, BUSY);
                if ( TEST_FLAG(eth->regs.int_mask, ETH_INT_MASK, BUSY_M) )
                if ( TEST_FLAG(eth->regs.int_mask, ETH_INT_MASK, BUSY_M) )
                  report_interrupt(eth->mac_int);
                  report_interrupt(eth->mac_int);
            }
            }
Line 317... Line 324...
                eth->rx.error = 1;
                eth->rx.error = 1;
            break;
            break;
 
 
        case ETH_RTX_SOCK:
        case ETH_RTX_SOCK:
            nread = recv(eth->rtx_sock, eth->rx_buff, ETH_MAXPL, MSG_DONTWAIT);
            nread = recv(eth->rtx_sock, eth->rx_buff, ETH_MAXPL, MSG_DONTWAIT);
            if (nread < 0) {
 
 
            if (nread == 0)
 
                break;
 
            else if (nread < 0) {
                        if ( errno != EAGAIN ) {
                        if ( errno != EAGAIN ) {
                            debug (3, "recv() FAILED!\n");
                            debug (3, "recv() FAILED!\n");
                            break;
                            break;
                        }
                        }
                        else {
                        else {
                        break;
                        break;
                    }
                    }
                }
                }
 
            /* If not promiscouos mode, check the destination address */
 
            if (!TEST_FLAG(eth->regs.moder, ETH_MODER, PRO)) {
 
                if (TEST_FLAG(eth->regs.moder, ETH_MODER, IAM) && (eth->rx_buff[0] & 1)) {
 
                /* Nothing for now */
 
                }
 
 
 
                if (eth->mac_address[5] != eth->rx_buff[0] ||
 
                    eth->mac_address[4] != eth->rx_buff[1] ||
 
                    eth->mac_address[3] != eth->rx_buff[2] ||
 
                    eth->mac_address[2] != eth->rx_buff[3] ||
 
                    eth->mac_address[1] != eth->rx_buff[4] ||
 
                    eth->mac_address[0] != eth->rx_buff[5])
 
                        break;
 
            }
 
 
 
            eth->rx.packet_length = nread;
            eth->rx.bytes_left = nread;
            eth->rx.bytes_left = nread;
            eth->rx.bytes_read = 0;
            eth->rx.bytes_read = 0;
 
 
            debug (3, "RX - entering state WRITEFIFO\n");
            debug (3, "RX - entering state WRITEFIFO\n");
            eth->rx.state = ETH_RXSTATE_WRITEFIFO;
            eth->rx.state = ETH_RXSTATE_WRITEFIFO;
Line 337... Line 363...
            break;
            break;
        }
        }
        break;
        break;
 
 
    case ETH_RXSTATE_WRITEFIFO:
    case ETH_RXSTATE_WRITEFIFO:
 
#if 1
        send_word = ((unsigned long)eth->rx_buff[eth->rx.bytes_read]   << 24) |
        send_word = ((unsigned long)eth->rx_buff[eth->rx.bytes_read]   << 24) |
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+1] << 16) |
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+1] << 16) |
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+2] << 8)  |
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+2] << 8)  |
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+3] );
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+3] );
        set_mem32( eth->rx.bd_addr + eth->rx.bytes_read, send_word, &breakpoint);
        set_mem32( eth->rx.bd_addr + eth->rx.bytes_read, send_word, &breakpoint);
 
 
        /* update counters */
        /* update counters */
        debug (3, "Write %d, left %d - %08lXd\n", eth->rx.bytes_read, eth->rx.bytes_left, send_word);
        debug (3, "Write %d, left %d - %08lXd\n", eth->rx.bytes_read, eth->rx.bytes_left, send_word);
        eth->rx.bytes_left -= 4;
        eth->rx.bytes_left -= 4;
        eth->rx.bytes_read += 4;
        eth->rx.bytes_read += 4;
 
#else
 
        set_mem8( eth->rx.bd_addr + eth->rx.bytes_read, eth->rx_buff[eth->rx.bytes_read], &breakpoint);
 
        eth->rx.bytes_left -= 1;
 
        eth->rx.bytes_read += 1;
 
#endif
 
 
        if ( eth->rx.bytes_left <= 0 ) {
        if ( eth->rx.bytes_left <= 0 ) {
            /* Write result to bd */
            /* Write result to bd */
            SET_FIELD( eth->rx.bd, ETH_RX_BD, LENGTH, eth->rx.packet_length );
            SET_FIELD( eth->rx.bd, ETH_RX_BD, LENGTH, eth->rx.packet_length );
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, READY);
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, READY);
            SET_FLAG( eth->regs.int_source, ETH_INT_SOURCE, RXB);
            SET_FLAG( eth->regs.int_source, ETH_INT_SOURCE, RXB);
 
 
            if ( eth->rx.packet_length < GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MINFL ) )
            if ( eth->rx.packet_length < GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MINFL ) )
                SET_FLAG( eth->rx.bd, ETH_RX_BD, TOOBIG);
 
            if ( eth->rx.packet_length > GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MAXFL ) )
 
                SET_FLAG( eth->rx.bd, ETH_RX_BD, TOOSHORT);
                SET_FLAG( eth->rx.bd, ETH_RX_BD, TOOSHORT);
 
            if ( eth->rx.packet_length > GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MAXFL ) )
 
                SET_FLAG( eth->rx.bd, ETH_RX_BD, TOOBIG);
 
 
            eth->regs.bd_ram[eth->rx.bd_index] = eth->rx.bd;
            eth->regs.bd_ram[eth->rx.bd_index] = eth->rx.bd;
 
 
            /* advance to next BD */
            /* advance to next BD */
            if ( TEST_FLAG( eth->rx.bd, ETH_RX_BD, WRAP ) || eth->rx.bd_index >= ETH_BD_COUNT )
            if ( TEST_FLAG( eth->rx.bd, ETH_RX_BD, WRAP ) || eth->rx.bd_index >= ETH_BD_COUNT )
Line 598... Line 630...
        printf( "MIIRX_DATA   : 0x%08lX\n", eth->regs.miirx_data );
        printf( "MIIRX_DATA   : 0x%08lX\n", eth->regs.miirx_data );
        printf( "MIISTATUS    : 0x%08lX\n", eth->regs.miistatus );
        printf( "MIISTATUS    : 0x%08lX\n", eth->regs.miistatus );
        printf( "MAC Address  : %02X:%02X:%02X:%02X:%02X:%02X\n",
        printf( "MAC Address  : %02X:%02X:%02X:%02X:%02X:%02X\n",
                eth->mac_address[0], eth->mac_address[1], eth->mac_address[2],
                eth->mac_address[0], eth->mac_address[1], eth->mac_address[2],
                eth->mac_address[3], eth->mac_address[4], eth->mac_address[5] );
                eth->mac_address[3], eth->mac_address[4], eth->mac_address[5] );
 
        printf( "HASH0        : 0x%08lX\n", eth->regs.hash0 );
 
        printf( "HASH1        : 0x%08lX\n", eth->regs.hash1 );
    }
    }
}
}
/* ========================================================================= */
/* ========================================================================= */
 
 
 
 
Line 652... Line 686...
                               (((unsigned long)eth->mac_address[2]) << 16) |
                               (((unsigned long)eth->mac_address[2]) << 16) |
                               (((unsigned long)eth->mac_address[1]) << 8) |
                               (((unsigned long)eth->mac_address[1]) << 8) |
                                 (unsigned long)eth->mac_address[0];
                                 (unsigned long)eth->mac_address[0];
    case ETH_MAC_ADDR1: return (((unsigned long)eth->mac_address[5]) << 8) |
    case ETH_MAC_ADDR1: return (((unsigned long)eth->mac_address[5]) << 8) |
                                 (unsigned long)eth->mac_address[4];
                                 (unsigned long)eth->mac_address[4];
 
    case ETH_HASH0: return eth->regs.hash0;
 
    case ETH_HASH1: return eth->regs.hash1;
    /*case ETH_DMA_RX_TX: return eth_rx( eth );*/
    /*case ETH_DMA_RX_TX: return eth_rx( eth );*/
    }
    }
 
 
    if ( (addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE) )
    if ( (addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE) )
        return eth->regs.bd_ram[(addr - ETH_BD_BASE) / 4];
        return eth->regs.bd_ram[(addr - ETH_BD_BASE) / 4];
Line 678... Line 714...
    return;
    return;
    }
    }
 
 
    switch( addr ) {
    switch( addr ) {
    case ETH_MODER: eth->regs.moder = value; return;
    case ETH_MODER: eth->regs.moder = value; return;
    case ETH_INT_SOURCE: eth->regs.int_source = value; return;
    case ETH_INT_SOURCE: eth->regs.int_source &= ~value; return;
    case ETH_INT_MASK: eth->regs.int_mask = value; return;
    case ETH_INT_MASK: eth->regs.int_mask = value; return;
    case ETH_IPGT: eth->regs.ipgt = value; return;
    case ETH_IPGT: eth->regs.ipgt = value; return;
    case ETH_IPGR1: eth->regs.ipgr1 = value; return;
    case ETH_IPGR1: eth->regs.ipgr1 = value; return;
    case ETH_IPGR2: eth->regs.ipgr2 = value; return;
    case ETH_IPGR2: eth->regs.ipgr2 = value; return;
    case ETH_PACKETLEN: eth->regs.packetlen = value; return;
    case ETH_PACKETLEN: eth->regs.packetlen = value; return;
Line 703... Line 739...
        return;
        return;
    case ETH_MAC_ADDR1:
    case ETH_MAC_ADDR1:
        eth->mac_address[4] = value & 0xFF;
        eth->mac_address[4] = value & 0xFF;
        eth->mac_address[5] = (value >> 8) & 0xFF;
        eth->mac_address[5] = (value >> 8) & 0xFF;
        return;
        return;
 
    case ETH_HASH0: eth->regs.hash0 = value; return;
 
    case ETH_HASH1: eth->regs.hash1 = value; return;
 
 
    /*case ETH_DMA_RX_TX: eth_tx( eth, value ); return;*/
    /*case ETH_DMA_RX_TX: eth_tx( eth, value ); return;*/
    }
    }
 
 
    if ( (addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE) ) {
    if ( (addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE) ) {

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