OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_65/] [or1ksim/] [pic/] [pic.c] - Diff between revs 567 and 600

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 567 Rev 600
Line 44... Line 44...
/* Simulation hook. Must be called every clock cycle to simulate PIC
/* Simulation hook. Must be called every clock cycle to simulate PIC
   It does internal functional PIC simulation. */
   It does internal functional PIC simulation. */
inline void pic_clock()
inline void pic_clock()
{
{
  unsigned long picsr;
  unsigned long picsr;
  unsigned long picpr;
 
  unsigned long sr;
  unsigned long sr;
 
 
  /* From Sections 16.3 & 16.4, bits 0 & 1 are reserved */
  /* From Sections 16.3 & 16.4, bits 0 & 1 are reserved */
  picsr = mfspr(SPR_PICSR);
  picsr = mfspr(SPR_PICSR);
  picpr = mfspr(SPR_PICPR) | 0x00000003;
 
  sr = mfspr(SPR_SR);
  sr = mfspr(SPR_SR);
 
 
  /* Don't do anything if interrupts not currently enabled */
  /* Don't do anything if interrupts not currently enabled or
  if((sr & (SPR_SR_EIR | SPR_SR_EXR)) != (SPR_SR_EIR | SPR_SR_EXR))
     higher priority exception was allready reported */
 
  if(((sr & SPR_SR_IEE) != SPR_SR_IEE) || pending.valid)
    return;
    return;
 
 
  if(picsr & picpr) /* Report High Priority Interrupts first */
  if(picsr)
    except_handle(EXCEPT_HPINT, 0);
    except_handle(EXCEPT_INT, 0);
  else if(picsr)    /* Report a Low Priority Interrupt otherwise */
 
    except_handle(EXCEPT_LPINT, 0);
 
}
}
 
 
/* Asserts interrupt to the PIC. */
/* Asserts interrupt to the PIC. */
void report_interrupt(int line)
void report_interrupt(int line)
{
{

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.