| Line 98... |
Line 98... |
uarts[chipsel].istat.txbuf_head = (uarts[chipsel].istat.txbuf_head + 1) % uarts[chipsel].fifo_len;
|
uarts[chipsel].istat.txbuf_head = (uarts[chipsel].istat.txbuf_head + 1) % uarts[chipsel].fifo_len;
|
} else
|
} else
|
uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
|
uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
|
|
|
uarts[chipsel].regs.lsr &= ~(UART_LSR_TXSERE | UART_LSR_TXBUFE);
|
uarts[chipsel].regs.lsr &= ~(UART_LSR_TXSERE | UART_LSR_TXBUFE);
|
|
|
uarts[chipsel].istat.thre_int = 0;
|
uarts[chipsel].istat.thre_int = 0;
|
break;
|
break;
|
case UART_FCR:
|
case UART_FCR:
|
uarts[chipsel].regs.fcr = value & UART_VALID_FCR;
|
uarts[chipsel].regs.fcr = value & UART_VALID_FCR;
|
if (uarts[chipsel].fifo_len == 1 && (value & UART_FCR_FIE)
|
if (uarts[chipsel].fifo_len == 1 && (value & UART_FCR_FIE)
|
| Line 120... |
Line 119... |
uarts[chipsel].regs.lsr &= ~UART_LSR_RDRDY;
|
uarts[chipsel].regs.lsr &= ~UART_LSR_RDRDY;
|
}
|
}
|
break;
|
break;
|
case UART_IER:
|
case UART_IER:
|
uarts[chipsel].regs.ier = value & UART_VALID_IER;
|
uarts[chipsel].regs.ier = value & UART_VALID_IER;
|
uarts[chipsel].istat.thre_int = 0;
|
#if 0
|
|
uarts[chipsel].istat.thre_int = 1;
|
|
#endif
|
break;
|
break;
|
case UART_LCR:
|
case UART_LCR:
|
uarts[chipsel].regs.lcr = value & UART_VALID_LCR;
|
uarts[chipsel].regs.lcr = value & UART_VALID_LCR;
|
uarts[chipsel].char_clks = char_clks(uarts[chipsel].regs.dll, uarts[chipsel].regs.dlh, uarts[chipsel].regs.lcr);
|
uarts[chipsel].char_clks = char_clks(uarts[chipsel].regs.dll, uarts[chipsel].regs.dlh, uarts[chipsel].regs.lcr);
|
break;
|
break;
|
| Line 376... |
Line 377... |
uarts[i].istat.rxbuf_head = uarts[i].istat.rxbuf_tail = 0;
|
uarts[i].istat.rxbuf_head = uarts[i].istat.rxbuf_tail = 0;
|
uarts[i].istat.txbuf_head = uarts[i].istat.txbuf_tail = 0;
|
uarts[i].istat.txbuf_head = uarts[i].istat.txbuf_tail = 0;
|
|
|
uarts[i].istat.break_set = 0;
|
uarts[i].istat.break_set = 0;
|
uarts[i].istat.timeout_count = 0;
|
uarts[i].istat.timeout_count = 0;
|
|
uarts[i].istat.thre_int = 0;
|
|
|
uarts[i].regs.lcr = UART_LCR_RESET;
|
uarts[i].regs.lcr = UART_LCR_RESET;
|
uarts[i].vapi.cur_break = uarts[i].vapi.cur_break_cnt = uarts[i].vapi.next_break = 0;
|
uarts[i].vapi.cur_break = uarts[i].vapi.cur_break_cnt = uarts[i].vapi.next_break = 0;
|
uarts[i].vapi.next_break_cnt = -1;
|
uarts[i].vapi.next_break_cnt = -1;
|
}
|
}
|
| Line 447... |
Line 449... |
uarts[i].vapi.cur_break_cnt++;
|
uarts[i].vapi.cur_break_cnt++;
|
if (uarts[i].vapi.cur_break_cnt > UART_BREAK_COUNT * uarts[i].vapi.char_clks) {
|
if (uarts[i].vapi.cur_break_cnt > UART_BREAK_COUNT * uarts[i].vapi.char_clks) {
|
if (!uarts[i].istat.break_set) {
|
if (!uarts[i].istat.break_set) {
|
unsigned lsr;
|
unsigned lsr;
|
uarts[i].istat.break_set = 1;
|
uarts[i].istat.break_set = 1;
|
lsr = UART_LSR_BREAK | UART_LSR_FRAME | UART_LSR_RXERR | UART_LSR_RDRDY;
|
lsr = UART_LSR_BREAK | UART_LSR_RXERR | UART_LSR_RDRDY;
|
if (uarts[i].regs.lcr & UART_LCR_PARITY) lsr |= UART_LSR_PARITY;
|
|
printf ("[%x]\n", uarts[i].regs.lsr);
|
printf ("[%x]\n", uarts[i].regs.lsr);
|
uarts[i].istat.rxser_full = 0;
|
uarts[i].istat.rxser_full = 0;
|
uarts[i].istat.rxser_clks = 0;
|
uarts[i].istat.rxser_clks = 0;
|
uart_add_char (i, lsr << 8);
|
uart_add_char (i, lsr << 8);
|
} else
|
} else
|
