OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_67/] [or1ksim/] [cpu/] [common/] [trace.c] - Diff between revs 1350 and 1436

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 1350 Rev 1436
Line 34... Line 34...
 
 
/* Set instruction execution breakpoint. */
/* Set instruction execution breakpoint. */
 
 
void set_insnbrkpoint(oraddr_t addr)
void set_insnbrkpoint(oraddr_t addr)
{
{
  addr &= 0xfffffffc;   /* 32-bit aligned */
  addr &= ~ADDR_C(3);   /* 32-bit aligned */
 
 
 
  if (!verify_memoryarea(addr))
 
    PRINTF("WARNING: This breakpoint is out of the simulated memory range.\n");
 
 
  if (verify_memoryarea(addr))
 
    if (has_breakpoint (addr)) {
    if (has_breakpoint (addr)) {
      remove_breakpoint (addr);
      remove_breakpoint (addr);
      PRINTF("\nBreakpoint at 0x%"PRIxADDR" cleared.\n", addr);
      PRINTF("\nBreakpoint at 0x%"PRIxADDR" cleared.\n", addr);
    } else {
    } else {
      add_breakpoint (addr);
      add_breakpoint (addr);
      PRINTF("\nBreakpoint at 0x%"PRIxADDR" set.\n", addr);
      PRINTF("\nBreakpoint at 0x%"PRIxADDR" set.\n", addr);
    }
    }
  else
 
    PRINTF("ERROR: Can't set this breakpoint out of memory.\n");
 
 
 
  return;
  return;
}
}
 
 
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.