Line 68... |
Line 68... |
int chipsel;
|
int chipsel;
|
|
|
debug("uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
|
debug("uart_write_byte(%x,%02x)\n", addr, (unsigned)value);
|
|
|
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
|
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
|
if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
|
if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
|
break;
|
break;
|
else if (chipsel == NR_UARTS)
|
else if (chipsel == NR_UARTS)
|
return;
|
return;
|
|
|
if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
|
if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
|
Line 93... |
Line 93... |
return;
|
return;
|
}
|
}
|
|
|
switch (addr % UART_ADDR_SPACE) {
|
switch (addr % UART_ADDR_SPACE) {
|
case UART_TXBUF:
|
case UART_TXBUF:
|
uarts[chipsel].regs.txbuf = value;
|
if (uarts[chipsel].istat.txbuf_full < uarts[chipsel].fifo_len) {
|
uarts[chipsel].istat.txbuf = FULL;
|
uarts[chipsel].istat.txbuf_full++;
|
|
uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
|
|
uarts[chipsel].istat.txbuf_head = (uarts[chipsel].istat.txbuf_head + 1) % uarts[chipsel].fifo_len;
|
|
} else
|
|
uarts[chipsel].regs.txbuf[uarts[chipsel].istat.txbuf_head] = value;
|
|
|
|
if (uarts[chipsel].istat.txbuf_full < uarts[chipsel].fifo_len)
|
uarts[chipsel].regs.lsr &= ~UART_LSR_TXBUFE;
|
uarts[chipsel].regs.lsr &= ~UART_LSR_TXBUFE;
|
|
else
|
|
uarts[chipsel].regs.lsr |= UART_LSR_TXBUFE;
|
uarts[chipsel].regs.lsr &= ~UART_LSR_TXSERE;
|
uarts[chipsel].regs.lsr &= ~UART_LSR_TXSERE;
|
|
|
uarts[chipsel].istat.thre_int = 0;
|
uarts[chipsel].istat.thre_int = 0;
|
break;
|
break;
|
case UART_IER:
|
case UART_IER:
|
uarts[chipsel].regs.ier = value & UART_VALID_IER;
|
uarts[chipsel].regs.ier = value & UART_VALID_IER;
|
break;
|
break;
|
Line 127... |
Line 136... |
int chipsel;
|
int chipsel;
|
|
|
debug("uart_read_byte(%x)\n", addr);
|
debug("uart_read_byte(%x)\n", addr);
|
|
|
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
|
for(chipsel = 0; chipsel < NR_UARTS; chipsel++)
|
if ((addr & ~(UART_ADDR_SPACE-1)) == uarts[chipsel].baseaddr)
|
if ((addr & ~(UART_ADDR_SPACE-1)) == config.uarts[chipsel].baseaddr)
|
break;
|
break;
|
else if (chipsel == NR_UARTS)
|
else if (chipsel == NR_UARTS)
|
return 0;
|
return 0;
|
|
|
if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
|
if (uarts[chipsel].regs.lcr & UART_LCR_DLAB) {
|
Line 148... |
Line 157... |
return value;
|
return value;
|
}
|
}
|
|
|
switch (addr % UART_ADDR_SPACE) {
|
switch (addr % UART_ADDR_SPACE) {
|
case UART_RXBUF:
|
case UART_RXBUF:
|
value = uarts[chipsel].regs.rxbuf;
|
if (uarts[chipsel].istat.rxbuf_full) {
|
uarts[chipsel].istat.rxbuf = EMPTY;
|
value = uarts[chipsel].regs.rxbuf[uarts[chipsel].istat.rxbuf_tail];
|
|
uarts[chipsel].istat.rxbuf_tail = (uarts[chipsel].istat.rxbuf_tail + 1) % uarts[chipsel].fifo_len;
|
|
uarts[chipsel].istat.rxbuf_full--;
|
|
}
|
|
|
|
if (uarts[chipsel].istat.rxbuf_full)
|
|
uarts[chipsel].regs.lsr |= UART_LSR_RDRDY;
|
|
else
|
uarts[chipsel].regs.lsr &= ~UART_LSR_RDRDY;
|
uarts[chipsel].regs.lsr &= ~UART_LSR_RDRDY;
|
break;
|
break;
|
case UART_IER:
|
case UART_IER:
|
value = uarts[chipsel].regs.ier & UART_VALID_IER;
|
value = uarts[chipsel].regs.ier & UART_VALID_IER;
|
break;
|
break;
|
Line 187... |
Line 203... |
}
|
}
|
|
|
/* Function that handles incoming VAPI data. */
|
/* Function that handles incoming VAPI data. */
|
void uart_vapi_read (unsigned long id, unsigned long data)
|
void uart_vapi_read (unsigned long id, unsigned long data)
|
{
|
{
|
printf ("UART: id %08x, data %08x\n", id, data);
|
int uart;
|
|
debug("UART: id %08x, data %08x\n", id, data);
|
|
uart = id & VAPI_DEVICE_ID;
|
|
uarts[uart].vapi_buf[uarts[uart].vapi_buf_head_ptr] = data;
|
|
uarts[uart].vapi_buf_head_ptr = (uarts[uart].vapi_buf_head_ptr + 1) % UART_RX_BUF;
|
|
if (uarts[uart].vapi_buf_tail_ptr == uarts[uart].vapi_buf_head_ptr) {
|
|
fprintf (stderr, "FATAL: uart VAPI buffer to small.\n");
|
|
exit (1);
|
|
}
|
}
|
}
|
|
|
/* Reset. It initializes all registers of all UART devices to zero values,
|
/* Reset. It initializes all registers of all UART devices to zero values,
|
(re)opens all RX/TX file streams and places devices in memory address
|
(re)opens all RX/TX file streams and places devices in memory address
|
space. */
|
space. */
|
Line 200... |
Line 224... |
int i;
|
int i;
|
|
|
if (!config.uarts_enabled)
|
if (!config.uarts_enabled)
|
config.nuarts = 0;
|
config.nuarts = 0;
|
|
|
|
if (config.sim.verbose && config.nuarts)
|
printf("Resetting %u UART(s).\n", config.nuarts);
|
printf("Resetting %u UART(s).\n", config.nuarts);
|
|
|
memset(uarts, 0, sizeof(uarts));
|
memset(uarts, 0, sizeof(uarts));
|
|
|
for(i = 0; i < config.nuarts; i++)
|
for(i = 0; i < config.nuarts; i++) {
|
if (config.uarts[i].txfile) { /* MM: Try to create stream. */
|
if (config.uarts[i].vapi_id) {
|
|
if ((config.uarts[i].vapi_id & VAPI_DEVICE_ID) != i) {
|
|
fprintf (stderr, "ERROR: Wrong vapi_id (0x%x) for uart %i, last byte is required to be %02x; ignoring.\n", config.uarts[i].vapi_id, i, i);
|
|
config.uarts[i].vapi_id = 0;
|
|
uarts[i].txfs = 0;
|
|
} else {
|
|
vapi_install_handler (config.uarts[i].vapi_id, uart_vapi_read);
|
|
register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
|
|
}
|
|
} else if (config.uarts[i].txfile) { /* MM: Try to create stream. */
|
if (!(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r"))
|
if (!(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r"))
|
&& !(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r+"))) {
|
&& !(uarts[i].rxfs = fopen(config.uarts[i].rxfile, "r+"))) {
|
printf("UART%d has problems with RX file stream.\n", i);
|
fprintf(stderr, "WARNING: UART%d has problems with RX file stream.\n", i);
|
continue;
|
continue;
|
}
|
}
|
uarts[i].txfs = fopen(config.uarts[i].txfile, "a");
|
uarts[i].txfs = fopen(config.uarts[i].txfile, "a");
|
uarts[i].baseaddr = config.uarts[i].baseaddr;
|
if (uarts[i].rxfs && uarts[i].txfs && config.sim.verbose) {
|
if (uarts[i].rxfs && uarts[i].txfs) {
|
printf("UART%d at 0x%.8x uses ", i, config.uarts[i].baseaddr);
|
printf("UART%d at 0x%.8x uses ", i, uarts[i].baseaddr);
|
|
printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
|
printf("%s for RX and %s for TX.\n", config.uarts[i].rxfile, config.uarts[i].txfile);
|
} else
|
} else
|
printf("UART%d has problems with TX file stream.\n", i);
|
fprintf(stderr, "WARNING: UART%d has problems with TX file stream.\n", i);
|
register_memoryarea(uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
|
register_memoryarea(config.uarts[i].baseaddr, UART_ADDR_SPACE, 1, uart_read_byte, uart_write_byte);
|
|
}
|
|
|
if (config.uarts[i].vapi_id)
|
if (config.uarts[i].uart16550)
|
vapi_install_handler (config.uarts[i].vapi_id, uart_vapi_read);
|
uarts[i].fifo_len = 16;
|
|
else
|
|
uarts[i].fifo_len = 1;
|
|
uarts[i].istat.rxbuf_head = uarts[i].istat.rxbuf_tail = 0;
|
|
uarts[i].istat.txbuf_head = uarts[i].istat.txbuf_tail = 0;
|
}
|
}
|
}
|
}
|
|
|
/* Simulation hook. Must be called every clock cycle to simulate all UART
|
/* Simulation hook. Must be called every clock cycle to simulate all UART
|
devices. It does internal functional UART simulation. */
|
devices. It does internal functional UART simulation. */
|
void uart_clock()
|
void uart_clock()
|
{
|
{
|
int i, retval;
|
int i, retval;
|
|
|
for(i = 0; i < config.nuarts; i++) {
|
for(i = 0; i < config.nuarts; i++) {
|
if (!uarts[i].txfs) {
|
/* If VAPI is not selected, UART communicates with two file streams;
|
continue;
|
if VAPI is selected, we use VAPI streams. */
|
}
|
|
|
/* if txfs is corrupted, skip this uart. */
|
|
if (!config.uarts[i].vapi_id && !uarts[i].txfs) continue;
|
|
|
/* Transmit */
|
/* Transmit */
|
if (uarts[i].istat.txser == EMPTY) {
|
if (!uarts[i].istat.txser_full) {
|
uarts[i].regs.lsr |= UART_LSR_TXBUFE;
|
uarts[i].regs.lsr |= UART_LSR_TXBUFE;
|
if (uarts[i].istat.txbuf == FULL) {
|
if (uarts[i].istat.txbuf_full) {
|
uarts[i].iregs.txser = uarts[i].regs.txbuf;
|
uarts[i].iregs.txser = uarts[i].regs.txbuf[uarts[i].istat.txbuf_tail];
|
uarts[i].istat.txser = FULL;
|
uarts[i].istat.txbuf_tail = (uarts[i].istat.txbuf_tail + 1) % uarts[i].fifo_len;
|
uarts[i].istat.txbuf = EMPTY;
|
uarts[i].istat.txser_full = 1;
|
|
uarts[i].istat.txbuf_full--;
|
uarts[i].regs.lsr &= ~UART_LSR_TXSERE;
|
uarts[i].regs.lsr &= ~UART_LSR_TXSERE;
|
uarts[i].istat.thre_int = 1;
|
uarts[i].istat.thre_int = 1;
|
} else
|
} else
|
uarts[i].regs.lsr |= UART_LSR_TXSERE;
|
uarts[i].regs.lsr |= UART_LSR_TXSERE;
|
} else if (uarts[i].char_clks == uarts[i].istat.txser_clks++) {
|
} else if (uarts[i].char_clks >= uarts[i].istat.txser_clks++) {
|
debug("TX \'%c\' via UART%d...\n", uarts[i].iregs.txser, i);
|
debug("TX \'%c\' via UART%d...\n", uarts[i].iregs.txser, i);
|
if (uarts[i].regs.mcr & UART_MCR_LOOP)
|
if (uarts[i].regs.mcr & UART_MCR_LOOP)
|
uarts[i].iregs.loopback = uarts[i].iregs.txser;
|
uarts[i].iregs.loopback = uarts[i].iregs.txser;
|
else {
|
else {
|
fputc((int)uarts[i].iregs.txser, uarts[i].txfs);
|
/* Send to either VAPI or to file */
|
|
if (config.uarts[i].vapi_id) {
|
|
vapi_send (config.uarts[i].vapi_id, uarts[i].iregs.txser);
|
|
} else {
|
|
fputc((int)(uarts[i].iregs.txser & 0xFF), uarts[i].txfs);
|
fflush(uarts[i].txfs);
|
fflush(uarts[i].txfs);
|
}
|
}
|
uarts[i].istat.txser = EMPTY;
|
}
|
|
uarts[i].istat.txser_full = 1;
|
uarts[i].istat.txser_clks = 0;
|
uarts[i].istat.txser_clks = 0;
|
}
|
}
|
|
|
/* Receive */
|
/* Receive */
|
if (uarts[i].istat.rxser == EMPTY)
|
if (uarts[i].istat.rxser_full) {
|
uarts[i].istat.rxser = FULL;
|
if (uarts[i].char_clks >= uarts[i].istat.rxser_clks++) {
|
else if (uarts[i].char_clks == uarts[i].istat.rxser_clks++) {
|
|
debug("Receiving via UART%d...\n", i);
|
debug("Receiving via UART%d...\n", i);
|
if (uarts[i].regs.mcr & UART_MCR_LOOP)
|
uarts[i].istat.rxser_full = 0;
|
uarts[i].iregs.rxser = uarts[i].iregs.loopback;
|
uarts[i].istat.rxser_clks = 0;
|
else if((retval = fgetc(uarts[i].rxfs)) != EOF) {
|
|
uarts[i].iregs.rxser = (char)retval;
|
if (++uarts[i].istat.rxbuf_full > uarts[i].fifo_len)
|
if (uarts[i].istat.rxbuf == FULL)
|
|
uarts[i].regs.lsr |= UART_LSR_OVRRUN;
|
uarts[i].regs.lsr |= UART_LSR_OVRRUN;
|
|
else {
|
|
uarts[i].regs.rxbuf[uarts[i].istat.rxbuf_head] = uarts[i].iregs.rxser & 0xFF;
|
|
uarts[i].istat.rxbuf_head = (uarts[i].istat.rxbuf_head + 1) % uarts[i].fifo_len;
|
|
uarts[i].istat.rxbuf_full++;
|
|
}
|
uarts[i].regs.lsr |= UART_LSR_RDRDY;
|
uarts[i].regs.lsr |= UART_LSR_RDRDY;
|
uarts[i].regs.rxbuf = uarts[i].iregs.rxser;
|
|
uarts[i].istat.rxbuf = FULL;
|
|
}
|
}
|
uarts[i].istat.rxser = EMPTY;
|
}
|
uarts[i].istat.rxser_clks = 0;
|
|
|
/* Check if there is something waiting, and put it into rxser */
|
|
if (uarts[i].regs.mcr & UART_MCR_LOOP) {
|
|
uarts[i].iregs.rxser = uarts[i].iregs.loopback;
|
|
uarts[i].istat.rxser_full = 1;
|
|
} else {
|
|
if (!config.uarts[i].vapi_id) {
|
|
if((retval = fgetc(uarts[i].rxfs)) != EOF)
|
|
uarts[i].iregs.rxser = (char)retval;
|
|
uarts[i].istat.rxser_full = 1;
|
|
} else { /* VAPI */
|
|
if (uarts[i].vapi_buf_head_ptr != uarts[i].vapi_buf_tail_ptr) {
|
|
uarts[i].iregs.rxser = uarts[i].vapi_buf[uarts[i].vapi_buf_tail_ptr];
|
|
uarts[i].vapi_buf_tail_ptr = (uarts[i].vapi_buf_tail_ptr + 1) % uarts[i].fifo_len;
|
|
uarts[i].istat.rxser_full = 1;
|
|
}
|
|
}
|
}
|
}
|
|
|
/* Loopback */
|
/* Loopback */
|
if (uarts[i].regs.mcr & UART_MCR_LOOP) {
|
if (uarts[i].regs.mcr & UART_MCR_LOOP) {
|
debug("uart_clock: Loopback\n");
|
debug("uart_clock: Loopback\n");
|
Line 329... |
Line 393... |
}
|
}
|
|
|
/* Print register values on stdout. */
|
/* Print register values on stdout. */
|
void uart_status()
|
void uart_status()
|
{
|
{
|
int i;
|
int i, j;
|
|
|
for(i = 0; i < config.nuarts; i++) {
|
for(i = 0; i < config.nuarts; i++) {
|
if ( !uarts[i].baseaddr )
|
if ( !config.uarts[i].baseaddr )
|
continue;
|
continue;
|
printf("\nUART%d visible registers at 0x%.8x:\n", i, uarts[i].baseaddr);
|
printf("\nUART%d visible registers at 0x%.8x:\n", i, config.uarts[i].baseaddr);
|
printf("RXBUF: %.2x TXBUF: %.2x\n", uarts[i].regs.rxbuf, uarts[i].regs.txbuf);
|
printf("RXBUF:");
|
|
for (j = uarts[i].istat.rxbuf_head; j != uarts[i].istat.rxbuf_tail; j = (j + 1) % uarts[i].fifo_len)
|
|
printf (" %.2x", uarts[i].regs.rxbuf[j]);
|
|
printf(" TXBUF: %.2x\n", uarts[i].regs.txbuf);
|
printf("DLL : %.2x DLH : %.2x\n", uarts[i].regs.dll, uarts[i].regs.dlh);
|
printf("DLL : %.2x DLH : %.2x\n", uarts[i].regs.dll, uarts[i].regs.dlh);
|
printf("IER : %.2x IIR : %.2x\n", uarts[i].regs.ier, uarts[i].regs.iir);
|
printf("IER : %.2x IIR : %.2x\n", uarts[i].regs.ier, uarts[i].regs.iir);
|
printf("LCR : %.2x MCR : %.2x\n", uarts[i].regs.lcr, uarts[i].regs.mcr);
|
printf("LCR : %.2x MCR : %.2x\n", uarts[i].regs.lcr, uarts[i].regs.mcr);
|
printf("LSR : %.2x MSR : %.2x\n", uarts[i].regs.lsr, uarts[i].regs.msr);
|
printf("LSR : %.2x MSR : %.2x\n", uarts[i].regs.lsr, uarts[i].regs.msr);
|
printf("SCR : %.2x\n", uarts[i].regs.scr);
|
printf("SCR : %.2x\n", uarts[i].regs.scr);
|
Line 348... |
Line 415... |
printf("RXSER: %.2x TXSER: %.2x\n", uarts[i].iregs.rxser, uarts[i].iregs.txser);
|
printf("RXSER: %.2x TXSER: %.2x\n", uarts[i].iregs.rxser, uarts[i].iregs.txser);
|
|
|
printf("\nInternal status (sim debug):\n");
|
printf("\nInternal status (sim debug):\n");
|
printf("char_clks: %d\n", uarts[i].char_clks);
|
printf("char_clks: %d\n", uarts[i].char_clks);
|
printf("rxser_clks: %d txser_clks: %d\n", uarts[i].istat.rxser_clks, uarts[i].istat.txser_clks);
|
printf("rxser_clks: %d txser_clks: %d\n", uarts[i].istat.rxser_clks, uarts[i].istat.txser_clks);
|
printf("rxser: %d txser: %d\n", uarts[i].istat.rxser, uarts[i].istat.txser);
|
printf("rxser: %d txser: %d\n", uarts[i].istat.rxser_full, uarts[i].istat.txser_full);
|
printf("rxbuf: %d txbuf: %d\n", uarts[i].istat.rxbuf, uarts[i].istat.txbuf);
|
printf("rxbuf: %d txbuf: %d\n", uarts[i].istat.rxbuf_full, uarts[i].istat.txbuf_full);
|
|
printf("Using IRQ%i", config.uarts[i].irq);
|
if (config.uarts[i].vapi_id)
|
if (config.uarts[i].vapi_id)
|
printf ("Connected to vapi ID=%x\n\n", config.uarts[i].vapi_id);
|
printf ("Connected to vapi ID=%x\n\n", config.uarts[i].vapi_id);
|
else
|
else
|
printf("RX fs: %p TX fs: %p\n\n", uarts[i].rxfs, uarts[i].txfs);
|
printf("RX fs: %p TX fs: %p\n\n", uarts[i].rxfs, uarts[i].txfs);
|
}
|
}
|