| Line 119... |
Line 119... |
config.dc.nsets = 0;
|
config.dc.nsets = 0;
|
config.dc.ustates = 0;
|
config.dc.ustates = 0;
|
config.dc.store_hitdelay = 0;
|
config.dc.store_hitdelay = 0;
|
config.dc.store_missdelay = 0;
|
config.dc.store_missdelay = 0;
|
|
|
/* Memory Controller */
|
|
config.mc.enabled = 0;
|
|
|
|
/* CPU */
|
/* CPU */
|
config.cpu.superscalar = 0;
|
config.cpu.superscalar = 0;
|
config.sim.history = 0;
|
config.sim.history = 0;
|
config.cpu.hazards = 0;
|
config.cpu.hazards = 0;
|
config.cpu.dependstats = 0;
|
config.cpu.dependstats = 0;
|
| Line 899... |
Line 896... |
comma ? "," :"", config.gpios[i].baseaddr, config.gpios[i].irq, config.gpios[i].base_vapi_id);
|
comma ? "," :"", config.gpios[i].baseaddr, config.gpios[i].irq, config.gpios[i].base_vapi_id);
|
comma = 1;
|
comma = 1;
|
}
|
}
|
fprintf (f, "},\n");
|
fprintf (f, "},\n");
|
|
|
fprintf (f, " mc:{enabled:%i, baseaddr:0x%08lx, POC:%i},\n", config.mc.enabled, config.mc.baseaddr, config.mc.POC);
|
|
fprintf (f, " memory:{pattern:%i, random_seed:%i, type:%s, nmemories:%i, table:{", config.memory.pattern, config.memory.random_seed,
|
fprintf (f, " memory:{pattern:%i, random_seed:%i, type:%s, nmemories:%i, table:{", config.memory.pattern, config.memory.random_seed,
|
config.memory.type == MT_UNKNOWN ? "MT_UNKNOWN" : config.memory.type == MT_PATTERN ? "MT_PATTERN" : "MT_RANDOM", config.memory.nmemories);
|
config.memory.type == MT_UNKNOWN ? "MT_UNKNOWN" : config.memory.type == MT_PATTERN ? "MT_PATTERN" : "MT_RANDOM", config.memory.nmemories);
|
comma = 0;
|
comma = 0;
|
for (i = 0; i < config.memory.nmemories; i++) {
|
for (i = 0; i < config.memory.nmemories; i++) {
|
fprintf (f, "%s\n {ce:%i, baseaddr:0x%08lx, size:0x%08lx, name:\"%s\", log:\"%s\", delayr:%i, delayw:%i}",
|
fprintf (f, "%s\n {ce:%i, baseaddr:0x%08lx, size:0x%08lx, name:\"%s\", log:\"%s\", delayr:%i, delayw:%i}",
|
