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https://opencores.org/ocsvn/or1k/or1k/trunk
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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#define NR_UARTS 4 /* Number of UARTs simulated */
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#define NR_UARTS 4 /* Number of UARTs simulated */
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#define NR_DMAS 1 /* Number of DMA controllers */
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#define NR_DMAS 1 /* Number of DMA controllers */
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#define NR_ETHERNETS 2 /* Number of Ethernet MACs */
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#define NONE 0
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#define NONE 0
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#define VIRTUAL 1
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#define VIRTUAL 1
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#define PHYSICAL 2
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#define PHYSICAL 2
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#define STR_SIZE (256)
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#define STR_SIZE (256)
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unsigned long baseaddr;
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unsigned long baseaddr;
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unsigned irq;
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unsigned irq;
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} dmas[NR_DMAS];
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} dmas[NR_DMAS];
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struct {
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struct {
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unsigned long baseaddr;
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unsigned dma; /* Which controller is this ethernet "connected" to */
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unsigned tx_channel; /* DMA channel used for TX */
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unsigned rx_channel; /* DMA channel used for RX */
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char *rxfile;
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char *txfile;
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} ethernets[NR_ETHERNETS];
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struct {
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char memory_table_file[STR_SIZE]; /* Memory table filename */
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char memory_table_file[STR_SIZE]; /* Memory table filename */
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int enable; /* is MC enabled? */
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int enable; /* is MC enabled? */
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unsigned POC; /* power on reset configuration register */
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unsigned POC; /* power on reset configuration register */
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} mc;
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} mc;
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