URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_67/] [or1ksim/] [sim-config.h] - Diff between revs 313 and 332

Rev 313	Rev 332
Line 37...	Line 37...

`struct {`	`struct {`
`int tagtype;`	`int tagtype;`
`} ic;`	`} ic;`

	`struct {`
	`int enabled; /* Is tick timer enabled? */`
	`int irq; /* IRQ of this device */`
	`} tick;`

`int clkcycle_ns; /* Clock cycle in nanoseconds */`	`int clkcycle_ns; /* Clock cycle in nanoseconds */`

`int nuarts;`	`int nuarts;`
`int uarts_enabled;`	`int uarts_enabled;`
`struct {`	`struct {`
`char rxfile[STR_SIZE]; /* Filename for RX */`	`char rxfile[STR_SIZE]; /* Filename for RX */`
`char txfile[STR_SIZE]; /* Filename for TX (required) */`	`char txfile[STR_SIZE]; /* Filename for TX (required) */`
`int jitter; /* CZ 250801 - in msecs...time to block */`	`int jitter; /* CZ 250801 - in msecs...time to block */`
`unsigned long baseaddr; /* Naturally aligned base address */`	`unsigned long baseaddr; /* Naturally aligned base address */`
	`int irq; /* IRQ of this device */`
`unsigned long vapi_id; /* VAPI id for this instance */`	`unsigned long vapi_id; /* VAPI id for this instance */`
`} uarts[NR_UARTS];`	`} uarts[NR_UARTS];`

`int ndmas;`	`int ndmas;`
`int dmas_enabled;`	`int dmas_enabled;`
`struct {`	`struct {`
`unsigned long baseaddr;`	`unsigned long baseaddr;`
`unsigned irq;`	`int irq; /* IRQ of this device */`
`unsigned long vapi_id; /* VAPI id for this instance */`	`unsigned long vapi_id; /* VAPI id for this instance */`
`} dmas[NR_DMAS];`	`} dmas[NR_DMAS];`

`int nethernets;`	`int nethernets;`
`int ethernets_enabled;`	`int ethernets_enabled;`