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Line 19... |
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#include <stdio.h>
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#include <stdio.h>
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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#define NR_UARTS 4 /* Number of UARTs simulated */
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#define MAX_UARTS 4 /* Max. number of UARTs simulated */
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#define NR_DMAS 1 /* Number of DMA controllers */
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#define MAX_DMAS 4 /* Max. number of DMA controllers */
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#define NR_ETHERNETS 2 /* Number of Ethernet MACs */
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#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */
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#define MAX_MEMORIES 16 /* Max. number of memory devices attached */
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#define NONE 0
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#define NONE 0
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#define VIRTUAL 1
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#define VIRTUAL 1
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#define PHYSICAL 2
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#define PHYSICAL 2
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#define STR_SIZE (256)
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#define STR_SIZE (256)
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int jitter; /* CZ 250801 - in msecs...time to block */
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int jitter; /* CZ 250801 - in msecs...time to block */
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned long baseaddr; /* Naturally aligned base address */
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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unsigned long vapi_id; /* VAPI id for this instance */
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unsigned long vapi_id; /* VAPI id for this instance */
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int uart16550; /* Whether this device is uart 16450 or 16550 */
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int uart16550; /* Whether this device is uart 16450 or 16550 */
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} uarts[NR_UARTS];
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} uarts[MAX_UARTS];
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int ndmas;
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int ndmas;
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int dmas_enabled;
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int dmas_enabled;
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struct {
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struct {
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unsigned long baseaddr;
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unsigned long baseaddr;
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int irq; /* IRQ of this device */
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int irq; /* IRQ of this device */
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unsigned long vapi_id; /* VAPI id for this instance */
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unsigned long vapi_id; /* VAPI id for this instance */
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} dmas[NR_DMAS];
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} dmas[MAX_DMAS];
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int nethernets;
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int nethernets;
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int ethernets_enabled;
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int ethernets_enabled;
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struct {
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struct {
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unsigned long baseaddr;
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unsigned long baseaddr;
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unsigned tx_channel; /* DMA channel used for TX */
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unsigned tx_channel; /* DMA channel used for TX */
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unsigned rx_channel; /* DMA channel used for RX */
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unsigned rx_channel; /* DMA channel used for RX */
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char rxfile[STR_SIZE]; /* Filename for RX */
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char rxfile[STR_SIZE]; /* Filename for RX */
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char txfile[STR_SIZE]; /* File for TX */
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char txfile[STR_SIZE]; /* File for TX */
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unsigned long vapi_id; /* VAPI id for this instance */
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unsigned long vapi_id; /* VAPI id for this instance */
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} ethernets[NR_ETHERNETS];
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} ethernets[MAX_ETHERNETS];
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struct {
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struct {
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int enabled; /* is MC enabled? */
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int enabled; /* is MC enabled? */
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned long baseaddr; /* Naturally aligned base address */
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unsigned POC; /* power on reset configuration register */
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unsigned POC; /* power on reset configuration register */
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} mc;
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} mc;
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struct {
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struct {
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char memory_table_file[STR_SIZE]; /* Memory table filename */
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int pattern; /* A user specified memory initialization pattern */
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int pattern; /* A user specified memory initialization pattern */
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int random_seed; /* Initialize the memory with random values, starting with seed */
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int random_seed; /* Initialize the memory with random values, starting with seed */
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enum {
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enum {
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MT_UNKNOWN,
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MT_UNKNOWN,
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MT_PATTERN,
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MT_PATTERN,
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MT_RANDOM
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MT_RANDOM
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} type;
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} type;
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int nmemories; /* Number of attached memories */
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struct {
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int ce; /* Which ce this memory is associated with */
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unsigned long baseaddr; /* Start address of the memory */
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unsigned long size; /* Memory size */
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char name[STR_SIZE]; /* Memory type string */
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char log[STR_SIZE]; /* Memory log filename */
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int delayr; /* Read cycles */
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int delayw; /* Write cycles */
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} table[MAX_MEMORIES];
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} memory;
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} memory;
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struct {
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struct {
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unsigned long upr; /* Unit present register */
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unsigned long upr; /* Unit present register */
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unsigned long ver, rev; /* Version register */
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unsigned long ver, rev; /* Version register */
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int init; /* Whether we are still initilizing sim */
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int init; /* Whether we are still initilizing sim */
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int script_file_specified;/* Whether script file was already loaded */
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int script_file_specified;/* Whether script file was already loaded */
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char *filename; /* Original Command Simulator file (CZ) */
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char *filename; /* Original Command Simulator file (CZ) */
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} sim;
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} sim;
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struct {
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struct {
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FILE *log; /* Log file for this device */
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} table[MAX_MEMORIES];
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} memory;
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struct { /* Verification API, part of Advanced Core Verification */
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struct { /* Verification API, part of Advanced Core Verification */
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FILE *vapi_file; /* vapi file */
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FILE *vapi_file; /* vapi file */
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} vapi;
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} vapi;
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};
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};
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