URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] [or1k/] [tags/] [nog_patch_67/] [or1ksim/] [sim.cfg] - Diff between revs 261 and 262

Rev 261	Rev 262
Line 1...	Line 1...
	`section memory`
	`memory_table_file = "simmem.cfg"`
	`random_seed = 12345`
	`type = random`
	`end`

`section mc`	`section mc`
`enabled = 1`	`enabled = 1`
`baseaddr = 0xa0000000`	`baseaddr = 0xa0000000`
`memory_table_file = "simmem.cfg"`
`POC = 0x00000008 /* Power on configuration register */`	`POC = 0x00000008 /* Power on configuration register */`
`end`	`end`

`section uart`	`section uart`
`enabled = 1`	`enabled = 1`