| Line 31... |
Line 31... |
.extern _excpt_trap
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.extern _excpt_trap
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.section .except, "ax"
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.section .except, "ax"
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_buserr_vector:
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_buserr_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_buserr)
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l.movhi r10,hi(_excpt_buserr)
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l.ori r10,r10,lo(_excpt_buserr)
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l.ori r10,r10,lo(_excpt_buserr)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_buserr_vector_end:
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_buserr_vector_end:
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_dpfault_vector:
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_dpfault_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_dpfault)
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l.movhi r10,hi(_excpt_dpfault)
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l.ori r10,r10,lo(_excpt_dpfault)
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l.ori r10,r10,lo(_excpt_dpfault)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_dpfault_vector_end:
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_dpfault_vector_end:
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_ipfault_vector:
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_ipfault_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_ipfault)
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l.movhi r10,hi(_excpt_ipfault)
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l.ori r10,r10,lo(_excpt_ipfault)
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l.ori r10,r10,lo(_excpt_ipfault)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_ipfault_vector_end:
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_ipfault_vector_end:
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_lpint_vector:
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_lpint_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_tick)
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l.movhi r10,hi(_excpt_tick)
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l.ori r10,r10,lo(_excpt_tick)
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l.ori r10,r10,lo(_excpt_tick)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_lpint_vector_end:
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_lpint_vector_end:
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_align_vector:
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_align_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_align)
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l.movhi r10,hi(_excpt_align)
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l.ori r10,r10,lo(_excpt_align)
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l.ori r10,r10,lo(_excpt_align)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_align_vector_end:
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_align_vector_end:
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_illinsn_vector:
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_illinsn_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_illinsn)
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l.movhi r10,hi(_excpt_illinsn)
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l.ori r10,r10,lo(_excpt_illinsn)
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l.ori r10,r10,lo(_excpt_illinsn)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_illinsn_vector_end:
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_illinsn_vector_end:
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_hpint_vector:
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_hpint_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_int)
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l.movhi r10,hi(_excpt_int)
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l.ori r10,r10,lo(_excpt_int)
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l.ori r10,r10,lo(_excpt_int)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_hpint_vector_end:
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_hpint_vector_end:
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_dtlbmiss_vector:
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_dtlbmiss_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_dtlbmiss)
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l.movhi r10,hi(_excpt_dtlbmiss)
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l.ori r10,r10,lo(_excpt_dtlbmiss)
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l.ori r10,r10,lo(_excpt_dtlbmiss)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_dtlbmiss_vector_end:
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_dtlbmiss_vector_end:
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_itlbmiss_vector:
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_itlbmiss_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_itlbmiss)
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l.movhi r10,hi(_excpt_itlbmiss)
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l.ori r10,r10,lo(_excpt_itlbmiss)
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l.ori r10,r10,lo(_excpt_itlbmiss)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_itlbmiss_vector_end:
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_itlbmiss_vector_end:
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_range_vector:
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_range_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_range)
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l.movhi r10,hi(_excpt_range)
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l.ori r10,r10,lo(_excpt_range)
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l.ori r10,r10,lo(_excpt_range)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_range_vector_end:
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_range_vector_end:
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_syscall_vector:
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_syscall_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_syscall)
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l.movhi r10,hi(_excpt_syscall)
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l.ori r10,r10,lo(_excpt_syscall)
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l.ori r10,r10,lo(_excpt_syscall)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_syscall_vector_end:
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_syscall_vector_end:
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_break_vector:
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_break_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_break)
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l.movhi r10,hi(_excpt_break)
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l.ori r10,r10,lo(_excpt_break)
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l.ori r10,r10,lo(_excpt_break)
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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_break_vector_end:
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_break_vector_end:
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_trap_vector:
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_trap_vector:
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l.addi r1,r1,-116
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l.addi r1,r1,-120
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l.sw 0x18(r1),r9
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l.sw 0x1c(r1),r9
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l.sw 0x1c(r1),r10
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l.sw 0x20(r1),r10
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l.movhi r9,hi(store_regs)
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l.movhi r9,hi(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.ori r9,r9,lo(store_regs)
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l.movhi r10,hi(_excpt_trap)
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l.movhi r10,hi(_excpt_trap)
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l.ori r10,r10,lo(_excpt_trap)
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l.ori r10,r10,lo(_excpt_trap)
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l.jr r9
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l.jr r9
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| Line 287... |
Line 287... |
l.movhi r3,hi(MC_BASE_ADDR)
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l.movhi r3,hi(MC_BASE_ADDR)
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l.ori r3,r3,lo(MC_BASE_ADDR)
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l.ori r3,r3,lo(MC_BASE_ADDR)
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|
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l.addi r4,r3,MC_CSC(0)
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l.addi r4,r3,MC_CSC(0)
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l.movhi r5,hi(FLASH_BASE_ADDR)
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l.movhi r5,hi(FLASH_BASE_ADDR)
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l.srai r5,r5,5
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l.srai r5,r5,6
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l.ori r5,r5,0x0025
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l.ori r5,r5,0x0025
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l.sw 0(r4),r5
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l.sw 0(r4),r5
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|
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l.addi r4,r3,MC_TMS(0)
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l.addi r4,r3,MC_TMS(0)
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l.movhi r5,hi(FLASH_TMS_VAL)
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l.movhi r5,hi(FLASH_TMS_VAL)
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| Line 312... |
Line 312... |
l.ori r5,r5,lo(SDRAM_TMS_VAL)
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l.ori r5,r5,lo(SDRAM_TMS_VAL)
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l.sw 0(r4),r5
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l.sw 0(r4),r5
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|
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l.addi r4,r3,MC_CSC(1)
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l.addi r4,r3,MC_CSC(1)
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l.movhi r5,hi(SDRAM_BASE_ADDR)
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l.movhi r5,hi(SDRAM_BASE_ADDR)
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l.srai r5,r5,5
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l.srai r5,r5,6
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l.ori r5,r5,0x0411
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l.ori r5,r5,0x0411
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l.sw 0(r4),r5
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l.sw 0(r4),r5
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l.jr r9
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l.jr r9
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l.nop
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l.nop
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store_regs:
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store_regs:
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l.sw 0x00(r1),r3
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l.sw 0x00(r1),r2
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l.sw 0x04(r1),r4
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l.sw 0x04(r1),r3
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l.sw 0x08(r1),r5
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l.sw 0x08(r1),r4
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l.sw 0x0c(r1),r6
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l.sw 0x0c(r1),r5
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l.sw 0x10(r1),r7
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l.sw 0x10(r1),r6
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l.sw 0x14(r1),r8
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l.sw 0x14(r1),r7
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l.sw 0x20(r1),r11
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l.sw 0x18(r1),r8
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l.sw 0x24(r1),r12
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l.sw 0x24(r1),r11
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l.sw 0x28(r1),r13
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l.sw 0x28(r1),r12
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l.sw 0x2c(r1),r14
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l.sw 0x2c(r1),r13
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l.sw 0x30(r1),r15
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l.sw 0x30(r1),r14
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l.sw 0x34(r1),r16
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l.sw 0x34(r1),r15
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l.sw 0x38(r1),r17
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l.sw 0x38(r1),r16
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l.sw 0x3c(r1),r18
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l.sw 0x3c(r1),r17
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l.sw 0x40(r1),r19
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l.sw 0x40(r1),r18
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l.sw 0x44(r1),r20
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l.sw 0x44(r1),r19
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l.sw 0x48(r1),r21
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l.sw 0x48(r1),r20
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l.sw 0x4c(r1),r22
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l.sw 0x4c(r1),r21
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l.sw 0x50(r1),r23
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l.sw 0x50(r1),r22
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l.sw 0x54(r1),r24
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l.sw 0x54(r1),r23
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l.sw 0x58(r1),r25
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l.sw 0x58(r1),r24
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l.sw 0x5c(r1),r26
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l.sw 0x5c(r1),r25
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l.sw 0x60(r1),r27
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l.sw 0x60(r1),r26
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l.sw 0x64(r1),r28
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l.sw 0x64(r1),r27
|
l.sw 0x68(r1),r29
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l.sw 0x68(r1),r28
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l.sw 0x6c(r1),r30
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l.sw 0x6c(r1),r29
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l.sw 0x70(r1),r31
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l.sw 0x70(r1),r30
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l.sw 0x74(r1),r31
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l.movhi r9,hi(end_except)
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l.movhi r9,hi(end_except)
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l.ori r9,r9,lo(end_except)
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l.ori r9,r9,lo(end_except)
|
l.lwz r10,0(r10)
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l.lwz r10,0(r10)
|
l.jr r10
|
l.jr r10
|
l.nop
|
l.nop
|
|
|
end_except:
|
end_except:
|
l.lwz r3,0x00(r1)
|
l.lwz r2,0x00(r1)
|
l.lwz r4,0x04(r1)
|
l.lwz r3,0x04(r1)
|
l.lwz r5,0x08(r1)
|
l.lwz r4,0x08(r1)
|
l.lwz r6,0x0c(r1)
|
l.lwz r5,0x0c(r1)
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l.lwz r7,0x10(r1)
|
l.lwz r6,0x10(r1)
|
l.lwz r8,0x14(r1)
|
l.lwz r7,0x14(r1)
|
l.lwz r9,0x18(r1)
|
l.lwz r8,0x18(r1)
|
l.lwz r10,0x1c(r1)
|
l.lwz r9,0x1c(r1)
|
l.lwz r11,0x20(r1)
|
l.lwz r10,0x20(r1)
|
l.lwz r12,0x24(r1)
|
l.lwz r11,0x24(r1)
|
l.lwz r13,0x28(r1)
|
l.lwz r12,0x28(r1)
|
l.lwz r14,0x2c(r1)
|
l.lwz r13,0x2c(r1)
|
l.lwz r15,0x30(r1)
|
l.lwz r14,0x30(r1)
|
l.lwz r16,0x34(r1)
|
l.lwz r15,0x34(r1)
|
l.lwz r17,0x38(r1)
|
l.lwz r16,0x38(r1)
|
l.lwz r18,0x3c(r1)
|
l.lwz r17,0x3c(r1)
|
l.lwz r19,0x40(r1)
|
l.lwz r18,0x40(r1)
|
l.lwz r20,0x44(r1)
|
l.lwz r19,0x44(r1)
|
l.lwz r21,0x48(r1)
|
l.lwz r20,0x48(r1)
|
l.lwz r22,0x4c(r1)
|
l.lwz r21,0x4c(r1)
|
l.lwz r23,0x50(r1)
|
l.lwz r22,0x50(r1)
|
l.lwz r24,0x54(r1)
|
l.lwz r23,0x54(r1)
|
l.lwz r25,0x58(r1)
|
l.lwz r24,0x58(r1)
|
l.lwz r26,0x5c(r1)
|
l.lwz r25,0x5c(r1)
|
l.lwz r27,0x60(r1)
|
l.lwz r26,0x60(r1)
|
l.lwz r28,0x64(r1)
|
l.lwz r27,0x64(r1)
|
l.lwz r29,0x68(r1)
|
l.lwz r28,0x68(r1)
|
l.lwz r30,0x6c(r1)
|
l.lwz r29,0x6c(r1)
|
l.lwz r31,0x70(r1)
|
l.lwz r30,0x70(r1)
|
l.addi r1,r1,116
|
l.lwz r31,0x74(r1)
|
|
l.addi r1,r1,120
|
l.rfe
|
l.rfe
|
l.nop
|
l.nop
|
