| Line 19... |
Line 19... |
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdarg.h>
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#include <stdarg.h>
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#include <assert.h>
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#include <assert.h>
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#include "abstract.h"
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#include "cuc.h"
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#include "cuc.h"
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#include "insn.h"
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#include "insn.h"
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#include "profiler.h"
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#include "profiler.h"
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#include "sim-config.h"
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#include "sim-config.h"
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| Line 60... |
Line 62... |
while (t) {
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while (t) {
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if (f->INSN(t->ref).type & IT_MEMORY) {
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if (f->INSN(t->ref).type & IT_MEMORY) {
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GEN ("%s%c_end[%i]", first ? " && " : "",
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GEN ("%s%c_end[%i]", first ? " && " : "",
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II_IS_LOAD (f->INSN(t->ref).index) ? 'l' : 's', find_lsc_index (f, t->ref));
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II_IS_LOAD (f->INSN(t->ref).index) ? 'l' : 's', find_lsc_index (f, t->ref));
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} else if (f->INSN(t->ref).index == II_CALL) {
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} else if (f->INSN(t->ref).index == II_CALL) {
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int x;
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GEN ("%sf_end[%i]", first ? " && " : "", find_lsc_index (f, t->ref));
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GEN ("%sf_end[%i]", first ? " && " : "", find_lsc_index (f, t->ref));
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} else {
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} else {
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PRINTF ("print_deps: err %x\n", t->ref);
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PRINTF ("print_deps: err %lx\n", t->ref);
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assert (0);
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assert (0);
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}
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}
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first = 1;
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first = 1;
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t = t->next;
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t = t->next;
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}
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}
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| Line 84... |
Line 85... |
switch (opt & ~OPT_DEST) {
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switch (opt & ~OPT_DEST) {
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case OPT_NONE: assert (0); break;
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case OPT_NONE: assert (0); break;
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case OPT_CONST: if (f->INSN(ref).type & IT_COND && (f->INSN(ref).index == II_CMOV
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case OPT_CONST: if (f->INSN(ref).type & IT_COND && (f->INSN(ref).index == II_CMOV
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|| f->INSN(ref).index == II_ADD)) {
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|| f->INSN(ref).index == II_ADD)) {
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assert (op == 0 || op == 1);
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assert (op == 0 || op == 1);
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sprintf (s, "1'b%x", op);
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sprintf (s, "1'b%lx", op);
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} else sprintf (s, "32'h%x", op);
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} else sprintf (s, "32'h%lx", op);
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break;
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break;
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case OPT_REGISTER:
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case OPT_REGISTER:
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if (opt & OPT_DEST) sprintf (s, "t%x_%x", REF_BB(ref), REF_I(ref));
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if (opt & OPT_DEST) sprintf (s, "t%x_%x", REF_BB(ref), REF_I(ref));
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else sprintf (s, "r%i_%c", op, opt & OPT_DEST ? 'o' : 'i');
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else sprintf (s, "r%li_%c", op, opt & OPT_DEST ? 'o' : 'i');
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break;
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break;
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#if 0
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#if 0
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case OPT_FREG: assert (opt & OPT_DEST);
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case OPT_FREG: assert (opt & OPT_DEST);
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sprintf (s, "fr%i_o", op);
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sprintf (s, "fr%i_o", op);
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break;
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break;
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#endif
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#endif
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case OPT_REF: sprintf (s, "t%x_%x", REF_BB(op), REF_I(op)); break;
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case OPT_REF: sprintf (s, "t%lx_%lx", REF_BB(op), REF_I(op)); break;
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}
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}
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return s;
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return s;
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}
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}
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/* Prints out specified instruction */
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/* Prints out specified instruction */
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| Line 119... |
Line 120... |
else sprintf (tmp, "%s%c", tmp, *s);
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else sprintf (tmp, "%s%c", tmp, *s);
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s++;
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s++;
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}
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}
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GEN ("%-40s /* %s */\n", tmp, ii->disasm);
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GEN ("%-40s /* %s */\n", tmp, ii->disasm);
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if (ii->type & IT_MEMORY) {
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if (ii->type & IT_MEMORY) {
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int j, nls = find_lsc_index (f, REF (b, i));
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int nls = find_lsc_index (f, REF (b, i));
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if (II_IS_LOAD (ii->index)) {
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if (II_IS_LOAD (ii->index)) {
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int nm;
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int nm;
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for (nm = 0; nm < f->nmsched; nm++) if (f->msched[nm] == REF (b, i)) break;
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for (nm = 0; nm < f->nmsched; nm++) if (f->msched[nm] == REF (b, i)) break;
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assert (nm < f->nmsched);
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assert (nm < f->nmsched);
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| Line 155... |
Line 156... |
} else if (ii->index == II_REG) {
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} else if (ii->index == II_REG) {
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assert (ii->opt[1] == OPT_REF);
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assert (ii->opt[1] == OPT_REF);
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GEN (" if (");
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GEN (" if (");
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if (f->bb[b].mdep) print_deps (fo, f, b, f->bb[b].mdep, 0);
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if (f->bb[b].mdep) print_deps (fo, f, b, f->bb[b].mdep, 0);
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else GEN ("bb_stb[%i]", b);
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else GEN ("bb_stb[%i]", b);
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GEN (") t%x_%x <= #Tp t%x_%x;\n", b, i,
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GEN (") t%x_%x <= #Tp t%lx_%lx;\n", b, i,
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REF_BB (ii->op[1]), REF_I (ii->op[1]));
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REF_BB (ii->op[1]), REF_I (ii->op[1]));
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}
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}
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}
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}
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/* Outputs binary number */
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/* Outputs binary number */
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| Line 223... |
Line 224... |
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/* output header */
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/* output header */
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GEN ("/* %s -- generated by Custom Unit Compiler\n", tmp);
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GEN ("/* %s -- generated by Custom Unit Compiler\n", tmp);
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GEN (" (C) 2002 Opencores\n");
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GEN (" (C) 2002 Opencores\n");
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GEN (" function \"%s\"\n", funcname);
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GEN (" function \"%s\"\n", funcname);
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GEN (" at %08x - %08x\n", f->start_addr, f->end_addr);
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GEN (" at %08lx - %08lx\n", f->start_addr, f->end_addr);
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GEN (" num BBs %i */\n\n", f->num_bb);
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GEN (" num BBs %i */\n\n", f->num_bb);
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GEN ("`include \"timescale.v\"\n\n");
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GEN ("`include \"timescale.v\"\n\n");
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GEN ("module %s (clk, rst,\n", filename);
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GEN ("module %s (clk, rst,\n", filename);
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GEN (" l_adr_o, l_dat_i, l_req_o,\n");
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GEN (" l_adr_o, l_dat_i, l_req_o,\n");
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| Line 603... |
Line 604... |
cucdebug (1, "%s\n", s);
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cucdebug (1, "%s\n", s);
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for (i = 0; i < f->nmsched; i++)
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for (i = 0; i < f->nmsched; i++)
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if (j == 0 && f->mtype[i] & MT_LOAD
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if (j == 0 && f->mtype[i] & MT_LOAD
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|| j == 1 && f->mtype[i] & MT_STORE
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|| j == 1 && f->mtype[i] & MT_STORE
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|| j == 2 && f->mtype[i] & MT_CALL) {
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|| j == 2 && f->mtype[i] & MT_CALL) {
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dep_list *dep = f->INSN(f->msched[i]).dep;
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cucdebug (1, "msched[%i] = %x (mtype %x)\n", i, f->msched[i], f->mtype[i]);
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cucdebug (1, "msched[%i] = %x (mtype %x)\n", i, f->msched[i], f->mtype[i]);
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assert (f->INSN(f->msched[i]).opt[1] & (OPT_REF | OPT_REGISTER));
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assert (f->INSN(f->msched[i]).opt[1] & (OPT_REF | OPT_REGISTER));
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GEN ("if (");
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GEN ("if (");
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print_deps (fo, f, REF_BB(f->msched[i]), f->INSN(f->msched[i]).dep, 1);
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print_deps (fo, f, REF_BB(f->msched[i]), f->INSN(f->msched[i]).dep, 1);
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GEN (") begin\n");
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GEN (") begin\n");
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| Line 621... |
Line 621... |
case 4: GEN ("1111;\n"); break;
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case 4: GEN ("1111;\n"); break;
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default: assert (0);
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default: assert (0);
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}
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}
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GEN (" %c_linbrst_o = 1'b%i;\n", c,
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GEN (" %c_linbrst_o = 1'b%i;\n", c,
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(f->mtype[i] & MT_BURST) && !(f->mtype[i] & MT_BURSTE) ? 1 : 0);
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(f->mtype[i] & MT_BURST) && !(f->mtype[i] & MT_BURSTE) ? 1 : 0);
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GEN (" %c_adr_o = t%x_%x & ~32'h3;\n", c,
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GEN (" %c_adr_o = t%lx_%lx & ~32'h3;\n", c,
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REF_BB(f->INSN(f->msched[i]).op[1]), REF_I(f->INSN(f->msched[i]).op[1]));
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REF_BB(f->INSN(f->msched[i]).op[1]), REF_I(f->INSN(f->msched[i]).op[1]));
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GEN (" end else ");
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GEN (" end else ");
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}
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}
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GEN ("if (%c_end[%i]) begin\n", c, cur - 1);
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GEN ("if (%c_end[%i]) begin\n", c, cur - 1);
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GEN (" %c_req_o = 1'b0;\n", c);
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GEN (" %c_req_o = 1'b0;\n", c);
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| Line 654... |
Line 654... |
GEN (" fstart_o <= #Tp 1'b0;\n");
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GEN (" fstart_o <= #Tp 1'b0;\n");
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//GEN (" f11_r <= #Tp 32'h0;\n");
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//GEN (" f11_r <= #Tp 32'h0;\n");
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GEN (" end else begin\n");
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GEN (" end else begin\n");
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cucdebug (1, "calls \n");
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cucdebug (1, "calls \n");
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for (i = 0; i < f->nmsched; i++) if (f->mtype[i] & MT_CALL) {
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for (i = 0; i < f->nmsched; i++) if (f->mtype[i] & MT_CALL) {
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char t[30];
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dep_list *dep = f->INSN(f->msched[i]).dep;
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dep_list *dep = f->INSN(f->msched[i]).dep;
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cucdebug (1, "msched[%i] = %x (mtype %x)\n", i, f->msched[i], f->mtype[i]);
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cucdebug (1, "msched[%i] = %x (mtype %x)\n", i, f->msched[i], f->mtype[i]);
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assert (f->INSN(f->msched[i]).opt[1] & (OPT_REF | OPT_REGISTER));
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assert (f->INSN(f->msched[i]).opt[1] & (OPT_REF | OPT_REGISTER));
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GEN (" if (");
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GEN (" if (");
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print_deps (fo, f, REF_BB(f->msched[i]), f->INSN(f->msched[i]).dep, 1);
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print_deps (fo, f, REF_BB(f->msched[i]), f->INSN(f->msched[i]).dep, 1);
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| Line 990... |
Line 989... |
GEN ("\n");
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GEN ("\n");
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for (i = 0; i < nfuncs; i++) if (f[i]) {
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for (i = 0; i < nfuncs; i++) if (f[i]) {
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int nf = f[i]->tmp;
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int nf = f[i]->tmp;
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GEN ("\n%s%s i%i(.clk(clk), .rst(rst),\n", filename, prof_func[i].name, nf);
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GEN ("\n%s%s i%i(.clk(clk), .rst(rst),\n", filename, prof_func[i].name, nf);
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GEN ("");
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GEN (" .l_adr_o(i%i_l_adr), .l_dat_i(i%i_l_dat), .l_req_o(i_l_req[%i]),\n",
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GEN (" .l_adr_o(i%i_l_adr), .l_dat_i(i%i_l_dat), .l_req_o(i_l_req[%i]),\n",
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nf, nf, nf);
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nf, nf, nf);
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GEN (" .l_sel_o(i%i_l_sel), .l_linbrst_o(i%i_l_linbrst), .l_rdy_i(i%i_l_rdy),\n",
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GEN (" .l_sel_o(i%i_l_sel), .l_linbrst_o(i%i_l_linbrst), .l_rdy_i(i%i_l_rdy),\n",
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nf, nf, nf);
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nf, nf, nf);
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GEN (" .s_adr_o(i%i_s_adr), .s_dat_o(i%i_s_dat), .s_req_o(i_s_req[%i]),\n",
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GEN (" .s_adr_o(i%i_s_adr), .s_dat_o(i%i_s_dat), .s_req_o(i_s_req[%i]),\n",
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