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https://opencores.org/ocsvn/or1k/or1k/trunk
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section tick
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section tick
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enabled = 0
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enabled = 0
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irq = 3
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irq = 3
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end
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end
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/* MMU SECTION
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This section configures Memory Menangement Unit
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enabled = 0/1
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whether MMU is enabled
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nisets =
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number of ITLB sets; must be power of two
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niways =
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number of ITLB ways
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ipagesize =
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instruction page size; must be power of two
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ientrysize =
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instruction entry size in bytes
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iustates =
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number of ITLB usage states (2, 3, 4 etc., max is 4)
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ndsets =
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number of DTLB sets; must be power of two
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ndways =
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number of DTLB ways
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dpagesize =
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data page size; must be power of two
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dentrysize =
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data entry size in bytes
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dustates =
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number of DTLB usage states (2, 3, 4 etc., max is 4)
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*/
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section mmu
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enabled = 0
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nisets = 32
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niways = 1
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ipagesize = 4096
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ndsets = 32
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ndways = 1
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dpagesize = 4096
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endsection
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