| Line 122... |
Line 122... |
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/* CPU */
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/* CPU */
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config.cpu.superscalar = 0;
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config.cpu.superscalar = 0;
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config.sim.history = 0;
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config.sim.history = 0;
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config.cpu.hazards = 0;
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config.cpu.hazards = 0;
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config.cpu.raw_range = 0;
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config.cpu.dependstats = 0;
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config.cpu.dependstats = 0;
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config.cpu.sbuf_len = 0;
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config.cpu.sbuf_len = 0;
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config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
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config.cpu.upr = SPR_UPR_UP | SPR_UPR_DCP | SPR_UPR_ICP | SPR_UPR_DMP
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| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
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| SPR_UPR_IMP | SPR_UPR_OB32P | SPR_UPR_DUP | SPR_UPR_PICP
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| SPR_UPR_PMP | SPR_UPR_TTP;
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| SPR_UPR_PMP | SPR_UPR_TTP;
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| Line 145... |
Line 144... |
config.nethernets = 0;
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config.nethernets = 0;
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/* GPIO */
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/* GPIO */
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config.ngpios = 0;
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config.ngpios = 0;
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/* Tick timer */
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config.tick.enabled = 0;
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/* PM */
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/* PM */
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config.pm.enabled = 0;
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config.pm.enabled = 0;
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#endif
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#endif
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/* Configure runtime */
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/* Configure runtime */
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| Line 390... |
Line 386... |
void memory_name ();
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void memory_name ();
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void memory_log ();
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void memory_log ();
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void memory_delayr ();
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void memory_delayr ();
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void memory_delayw ();
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void memory_delayw ();
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void cpu_sbuf_len ();
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void cpu_sbuf_len ();
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void cpu_raw_range ();
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void eth_nethernets ();
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void eth_nethernets ();
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void eth_baseaddr ();
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void eth_baseaddr ();
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void eth_irq ();
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void eth_irq ();
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void eth_dma ();
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void eth_dma ();
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void eth_rtx_type ();
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void eth_rtx_type ();
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| Line 457... |
Line 452... |
{"cpu", 0}, /* 5 */
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{"cpu", 0}, /* 5 */
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{"sim", 0},
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{"sim", 0},
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{"debug", 0},
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{"debug", 0},
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{"VAPI", 0},
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{"VAPI", 0},
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{"ethernet",0},
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{"ethernet",0},
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{"tick", 0}, /* 10 */
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{"", 0}, /* 10 */
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{"immu", 0},
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{"immu", 0},
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{"dmmu", 0},
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{"dmmu", 0},
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{"ic", 0},
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{"ic", 0},
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{"dc", 0},
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{"dc", 0},
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{"gpio", 0}, /* 15 */
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{"gpio", 0}, /* 15 */
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| Line 525... |
Line 520... |
{5, "rev", "=0x%x", NULL, (void *)(&config.cpu.rev), 0},
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{5, "rev", "=0x%x", NULL, (void *)(&config.cpu.rev), 0},
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{5, "upr", "=0x%x", NULL, (void *)(&config.cpu.upr), 0},
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{5, "upr", "=0x%x", NULL, (void *)(&config.cpu.upr), 0},
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{5, "sr", "=0x%x", NULL, (void *)(&config.cpu.sr), 0},
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{5, "sr", "=0x%x", NULL, (void *)(&config.cpu.sr), 0},
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{5, "hazards", "=%i", NULL, (void *)(&config.cpu.hazards), 0},
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{5, "hazards", "=%i", NULL, (void *)(&config.cpu.hazards), 0},
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{5, "superscalar", "=%i", NULL, (void *)(&config.cpu.superscalar), 0},
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{5, "superscalar", "=%i", NULL, (void *)(&config.cpu.superscalar), 0},
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{5, "raw_range", "=%i", cpu_raw_range, (void *)(&config.cpu.raw_range), 0},
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{5, "dependstats", "=%i", NULL, (void *)(&config.cpu.dependstats), 0},
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{5, "dependstats", "=%i", NULL, (void *)(&config.cpu.dependstats), 0},
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{5, "sbuf_len", "=%i", cpu_sbuf_len, (void *)(&config.cpu.sbuf_len), 0},
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{5, "sbuf_len", "=%i", cpu_sbuf_len, (void *)(&config.cpu.sbuf_len), 0},
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|
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{6, "debug", "=%i", NULL, (void *)(&config.sim.debug), 0},
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{6, "debug", "=%i", NULL, (void *)(&config.sim.debug), 0},
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{6, "verbose", "=%i", NULL, (void *)(&config.sim.verbose), 0},
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{6, "verbose", "=%i", NULL, (void *)(&config.sim.verbose), 0},
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| Line 571... |
Line 565... |
{9, "rxfile", "=\"%s\"", eth_rxfile, (void *)(&tempS[0]), 0},
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{9, "rxfile", "=\"%s\"", eth_rxfile, (void *)(&tempS[0]), 0},
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{9, "txfile", "=\"%s\"", eth_txfile, (void *)(&tempS[0]), 0},
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{9, "txfile", "=\"%s\"", eth_txfile, (void *)(&tempS[0]), 0},
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{9, "sockif", "=\"%s\"", eth_sockif, (void *)(&tempS[0]), 0},
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{9, "sockif", "=\"%s\"", eth_sockif, (void *)(&tempS[0]), 0},
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{9, "vapi_id", "=0x%x", eth_vapi_id, (void *)(&tempUL), 0},
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{9, "vapi_id", "=0x%x", eth_vapi_id, (void *)(&tempUL), 0},
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{10, "enabled", "=%i", NULL, (void *)(&config.tick.enabled), 0},
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{11, "enabled", "=%i", immu_enabled, (void *)(&tempL), 0},
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{11, "enabled", "=%i", immu_enabled, (void *)(&tempL), 0},
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{11, "nsets", "=%i", immu_nsets, (void *)(&tempL), 0},
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{11, "nsets", "=%i", immu_nsets, (void *)(&tempL), 0},
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{11, "nways", "=%i", immu_nways, (void *)(&tempL), 0},
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{11, "nways", "=%i", immu_nways, (void *)(&tempL), 0},
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{11, "pagesize", "=%i", immu_pagesize, (void *)(&tempL), 0},
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{11, "pagesize", "=%i", immu_pagesize, (void *)(&tempL), 0},
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{11, "entrysize", "=%i", immu_entrysize,(void *)(&tempL), 0},
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{11, "entrysize", "=%i", immu_entrysize,(void *)(&tempL), 0},
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| Line 854... |
Line 846... |
config.memory.table[current_device].delayw = tempL;
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config.memory.table[current_device].delayw = tempL;
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else
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else
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ERROR("invalid device number.");
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ERROR("invalid device number.");
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}
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}
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void cpu_raw_range () {
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if (config.cpu.raw_range >= RAW_RANGE) {
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config.cpu.raw_range = RAW_RANGE - 1;
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WARNING("raw range too large; truncated.");
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} else if (config.cpu.raw_range < 0) {
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config.cpu.raw_range = 0;
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WARNING("raw range negative; disabled.");
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}
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}
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void cpu_sbuf_len () {
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void cpu_sbuf_len () {
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if (config.cpu.sbuf_len >= MAX_SBUF_LEN) {
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if (config.cpu.sbuf_len >= MAX_SBUF_LEN) {
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config.cpu.sbuf_len = MAX_SBUF_LEN - 1;
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config.cpu.sbuf_len = MAX_SBUF_LEN - 1;
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WARNING("sbuf_len too large; truncated.");
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WARNING("sbuf_len too large; truncated.");
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} else if (config.cpu.sbuf_len < 0) {
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} else if (config.cpu.sbuf_len < 0) {
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| Line 1433... |
Line 1415... |
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fprintf (f, " bpb:{enabled:%i, sbp_bnf_fwd:%i, sbp_bf_fwd:%i, btic:%i, missdelay:%i, hitdelay:%i},\n",
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fprintf (f, " bpb:{enabled:%i, sbp_bnf_fwd:%i, sbp_bf_fwd:%i, btic:%i, missdelay:%i, hitdelay:%i},\n",
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config.bpb.enabled, config.bpb.sbp_bnf_fwd, config.bpb.sbp_bf_fwd, config.bpb.btic, config.bpb.missdelay, config.bpb.hitdelay);
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config.bpb.enabled, config.bpb.sbp_bnf_fwd, config.bpb.sbp_bf_fwd, config.bpb.btic, config.bpb.missdelay, config.bpb.hitdelay);
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fprintf (f, " cpu:{upr:0x%08x, ver:0x%04x, rev:0x%04x, superscalar:%i, hazards:%i, dependstats:%i,\n"
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fprintf (f, " cpu:{upr:0x%08x, ver:0x%04x, rev:0x%04x, superscalar:%i, hazards:%i, dependstats:%i,\n"
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" raw_range:%i, sr:0x%08x},\n",
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" sr:0x%08x},\n",
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config.cpu.upr, config.cpu.ver, config.cpu.rev, config.cpu.superscalar, config.cpu.hazards, config.cpu.dependstats,
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config.cpu.upr, config.cpu.ver, config.cpu.rev, config.cpu.superscalar, config.cpu.hazards, config.cpu.dependstats,
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config.cpu.raw_range, config.cpu.sr);
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config.cpu.sr);
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|
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fprintf (f, " sim:{debug:%i, verbose:%i, profile:%i, prof_fn:\"%s\", mprofile:%i, mprof_fn:\"%s\",\n",
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fprintf (f, " sim:{debug:%i, verbose:%i, profile:%i, prof_fn:\"%s\", mprofile:%i, mprof_fn:\"%s\",\n",
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config.sim.debug, config.sim.verbose, config.sim.profile, config.sim.prof_fn, config.sim.mprofile, config.sim.mprof_fn);
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config.sim.debug, config.sim.verbose, config.sim.profile, config.sim.prof_fn, config.sim.mprofile, config.sim.mprof_fn);
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fprintf (f, " history:%i, exe_log:%i, exe_log_fn:\"%s\", clkcycle_ps:%i,\n",
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fprintf (f, " history:%i, exe_log:%i, exe_log_fn:\"%s\", clkcycle_ps:%i,\n",
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