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# Makefile.am -- Top level automake configuration file
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#
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#
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# Copyright (C) 1999 OpenCores
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# Copyright (C) 2008 Embecosm Limited
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#
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#
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# Contributor Jeremy Bennett
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#
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#
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# This file is part of OpenRISC 1000 Architectural Simulator.
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#
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#
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# This program is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by the Free
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# Software Foundation; either version 3 of the License, or (at your option)
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# any later version.
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#
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#
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# This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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# more details.
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#
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# You should have received a copy of the GNU General Public License along
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# with this program. If not, see .
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SUBDIRS = cpu \
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bpb \
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support \
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cache \
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mmu \
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peripheral \
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tick \
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pm \
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pic \
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debug \
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vapi \
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cuc \
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port
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SUBDIRS = cpu bpb support cache mmu peripheral tick pm pic debug vapi cuc port
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# Build a standalone simulator and a linkable library of the simulator
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bin_PROGRAMS = sim
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bin_PROGRAMS = sim
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lib_LTLIBRARIES = libsim.la
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include_HEADERS = or1ksim.h
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# The internal library
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noinst_LTLIBRARIES = libor1ksys.la
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libor1ksys_la_SOURCES = toplevel_support.c \
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sim-config.c \
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sim-config.h \
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profiler.c \
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mprofiler.c \
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profiler.h \
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mprofiler.h \
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sim-cmd.c
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libor1ksys_la_LIBADD = cpu/common/libcommon.la \
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cpu/$(CPU_ARCH)/libarch.la \
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cpu/or1k/libor1k.la \
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support/libsupport.la \
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mmu/libmmu.la \
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bpb/libbpb.la \
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cache/libcache.la \
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peripheral/libperipheral.la \
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peripheral/channels/libchannels.la \
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tick/libtick.la \
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pm/libpm.la \
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pic/libpic.la \
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debug/libdebug.la \
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vapi/libvapi.la \
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cuc/libcuc.la \
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port/libport.la
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libor1ksys_la_LDFLAGS = -lm
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# Standalone program
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sim_SOURCES = toplevel.c \
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or1ksim.h
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sim_LDADD = libor1ksys.la
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# Library
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sim_SOURCES = toplevel.c sim-config.c sim-config.h profiler.c \
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libsim_la_SOURCES = libtoplevel.c \
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mprofiler.c profiler.h mprofiler.h sim-cmd.c
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or1ksim.h
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sim_LDADD = cpu/common/libcommon.a cpu/$(CPU_ARCH)/libarch.a \
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cpu/or1k/libor1k.a support/libsupport.a mmu/libmmu.a \
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bpb/libbpb.a cache/libcache.a peripheral/libperipheral.a \
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peripheral/channels/libchannels.a \
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tick/libtick.a pm/libpm.a pic/libpic.a debug/libdebug.a \
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vapi/libvapi.a cuc/libcuc.a port/libport.a
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sim_LDFLAGS = -lm #-lreadline
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libsim_la_LIBADD = libor1ksys.la
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libsim_la_LIBADD = libor1ksys.la
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libsim_la_LIBADD = libor1ksys.la
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