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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] [sprs.c] - Diff between revs 1540 and 1549

Rev 1540	Rev 1549
Line 155...	Line 155...
`PRINTF ("SUSPEND: PMR[SUME] bit was set.\n");`	`PRINTF ("SUSPEND: PMR[SUME] bit was set.\n");`
`sim_done();`	`sim_done();`
`}`	`}`
`break;`	`break;`
`default:`	`default:`
`/* Mask reseved bits in DTLBMR and DTLBMR registers */`	`/* Mask reserved bits in DTLBMR and DTLBMR registers */`
`if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {`	`if ( (regno >= SPR_DTLBMR_BASE(0)) && (regno < SPR_DTLBTR_LAST(3))) {`
`if((regno & 0xff) < 0x80)`	`if((regno & 0xff) < 0x80)`
`cpu_state.sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) \|`	`cpu_state.sprs[regno] = ((value / config.dmmu.pagesize) * config.dmmu.pagesize) \|`
`(value & (SPR_DTLBMR_V \| SPR_DTLBMR_PL1 \| SPR_DTLBMR_CID \| SPR_DTLBMR_LRU));`	`(value & (SPR_DTLBMR_V \| SPR_DTLBMR_PL1 \| SPR_DTLBMR_CID \| SPR_DTLBMR_LRU));`
`else`	`else`