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Rev 1717 |
Rev 1720 |
Line 908... |
Line 908... |
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env->sprs[SPR_SR] |= SPR_SR_SM; /* SUPV mode */
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env->sprs[SPR_SR] |= SPR_SR_SM; /* SUPV mode */
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env->sprs[SPR_SR] &= ~(SPR_SR_IEE | SPR_SR_TEE); /* Disable interrupts. */
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env->sprs[SPR_SR] &= ~(SPR_SR_IEE | SPR_SR_TEE); /* Disable interrupts. */
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}
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}
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__or_dynop void op_set_except_pc(void)
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{
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env->pc = OP_PARAM1;
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}
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/* Before the code in op_{sys,trap}{,_delay} gets run, the scheduler runs.
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/* Before the code in op_{sys,trap}{,_delay} gets run, the scheduler runs.
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* Therefore the pc will point to the instruction after the l.sys or l.trap
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* Therefore the pc will point to the instruction after the l.sys or l.trap
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* instruction */
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* instruction */
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__or_dynop void op_prep_sys_delay(void)
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__or_dynop void op_prep_sys_delay(void)
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{
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{
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