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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [peripheral/] [atahost.c] - Diff between revs 1701 and 1702

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Rev 1701 Rev 1702
Line 32... Line 32...
/* get a prototype for 'reg_mem_area()', and 'adjust_rw_delay()' */
/* get a prototype for 'reg_mem_area()', and 'adjust_rw_delay()' */
#include "abstract.h"
#include "abstract.h"
#include "sim-config.h"
#include "sim-config.h"
#include "sched.h"
#include "sched.h"
 
 
/* all user defineable settings are in 'atahost_define.h'             */
 
#include "atahost_define.h"
 
#include "atahost.h"
#include "atahost.h"
 
 
 
/* default timing reset values */
 
#define PIO_MODE0_T1 6
 
#define PIO_MODE0_T2 28
 
#define PIO_MODE0_T4 2
 
#define PIO_MODE0_TEOC 23
 
 
 
#define DMA_MODE0_TM 4
 
#define DMA_MODE0_TD 21
 
#define DMA_MODE0_TEOC 21
 
 
/* reset and initialize ATA host core(s) */
/* reset and initialize ATA host core(s) */
static void ata_reset(void *dat)
static void ata_reset(void *dat)
{
{
   ata_host *ata = dat;
   ata_host *ata = dat;
 
 
   // reset the core registers
   // reset the core registers
   ata->regs.ctrl  = 0x0001;
   ata->regs.ctrl  = 0x0001;
   ata->regs.stat  = (ata->dev_id << 28) | (ata->rev << 24);
   ata->regs.stat  = (ata->dev_id << 28) | (ata->rev << 24);
   ata->regs.pctr  = (PIO_MODE0_TEOC << ATA_TEOC) | (PIO_MODE0_T4 << ATA_T4) | (PIO_MODE0_T2 << ATA_T2) | (PIO_MODE0_T1 << ATA_T1);
   ata->regs.pctr  = (ata->pio_mode0_teoc << ATA_TEOC) |
   ata->regs.pftr0 = (PIO_MODE0_TEOC << ATA_TEOC) | (PIO_MODE0_T4 << ATA_T4) | (PIO_MODE0_T2 << ATA_T2) | (PIO_MODE0_T1 << ATA_T1);
                     (ata->pio_mode0_t4 << ATA_T4) |
   ata->regs.pftr1 = (PIO_MODE0_TEOC << ATA_TEOC) | (PIO_MODE0_T4 << ATA_T4) | (PIO_MODE0_T2 << ATA_T2) | (PIO_MODE0_T1 << ATA_T1);
                     (ata->pio_mode0_t2 << ATA_T2) |
   ata->regs.dtr0  = (DMA_MODE0_TEOC << ATA_TEOC) | (DMA_MODE0_TD << ATA_TD) | (DMA_MODE0_TM << ATA_TM);
                     (ata->pio_mode0_t1 << ATA_T1);
   ata->regs.dtr1  = (DMA_MODE0_TEOC << ATA_TEOC) | (DMA_MODE0_TD << ATA_TD) | (DMA_MODE0_TM << ATA_TM);
   ata->regs.pftr0 = ata->regs.pctr;
 
   ata->regs.pftr1 = ata->regs.pctr;
 
   ata->regs.dtr0  = (ata->dma_mode0_teoc << ATA_TEOC) |
 
                     (ata->dma_mode0_td << ATA_TD) |
 
                     (ata->dma_mode0_tm << ATA_TM);
 
   ata->regs.dtr1  = ata->regs.dtr0;
   ata->regs.txb   = 0;
   ata->regs.txb   = 0;
 
 
   // inform simulator about new read/write delay timings
   // inform simulator about new read/write delay timings
   adjust_rw_delay( ata->mem, ata_pio_delay(ata->regs.pctr), ata_pio_delay(ata->regs.pctr) );
   adjust_rw_delay( ata->mem, ata_pio_delay(ata->regs.pctr), ata_pio_delay(ata->regs.pctr) );
 
 
Line 267... Line 280...
{
{
  ata_host *ata = dat;
  ata_host *ata = dat;
  ata->rev = val.int_val;
  ata->rev = val.int_val;
}
}
 
 
 
static void ata_pio_mode0_t1(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid pio_mode0_t1: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->pio_mode0_t1 = val.int_val;
 
}
 
 
 
static void ata_pio_mode0_t2(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid pio_mode0_t2: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->pio_mode0_t2 = val.int_val;
 
}
 
 
 
static void ata_pio_mode0_t4(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid pio_mode0_t4: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->pio_mode0_t4 = val.int_val;
 
}
 
 
 
static void ata_pio_mode0_teoc(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid pio_mode0_teoc: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->pio_mode0_teoc = val.int_val;
 
}
 
 
 
static void ata_dma_mode0_tm(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid dma_mode0_tm: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->dma_mode0_tm = val.int_val;
 
}
 
 
 
static void ata_dma_mode0_td(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid dma_mode0_td: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->dma_mode0_td = val.int_val;
 
}
 
 
 
static void ata_dma_mode0_teoc(union param_val val, void *dat)
 
{
 
  ata_host *ata = dat;
 
 
 
  if(val.int_val < 0 || val.int_val > 255) {
 
    fprintf(stderr, "Peripheral ATA: Invalid dma_mode0_teoc: %d\n", val.int_val);
 
    return;
 
  }
 
 
 
  ata->dma_mode0_teoc = val.int_val;
 
}
 
 
static void ata_dev_type0(union param_val val, void *dat)
static void ata_dev_type0(union param_val val, void *dat)
{
{
  ata_host *ata = dat;
  ata_host *ata = dat;
  ata->devices.device[0].conf.type = val.int_val;
  ata->devices.device[0].conf.type = val.int_val;
}
}
Line 340... Line 437...
 
 
  memset(new, 0, sizeof(ata_host));
  memset(new, 0, sizeof(ata_host));
  new->enabled = 1;
  new->enabled = 1;
  new->dev_id = 1;
  new->dev_id = 1;
 
 
 
  new->pio_mode0_t1 = PIO_MODE0_T1;
 
  new->pio_mode0_t2 = PIO_MODE0_T2;
 
  new->pio_mode0_t4 = PIO_MODE0_T4;
 
  new->pio_mode0_teoc = PIO_MODE0_TEOC;
 
 
 
  new->dma_mode0_tm = DMA_MODE0_TM;
 
  new->dma_mode0_td = DMA_MODE0_TD;
 
  new->dma_mode0_teoc = DMA_MODE0_TEOC;
 
 
  return new;
  return new;
}
}
 
 
static void ata_sec_end(void *dat)
static void ata_sec_end(void *dat)
{
{
Line 383... Line 489...
  reg_config_param(sec, "baseaddr", paramt_addr, ata_baseaddr);
  reg_config_param(sec, "baseaddr", paramt_addr, ata_baseaddr);
  reg_config_param(sec, "irq", paramt_int, ata_irq);
  reg_config_param(sec, "irq", paramt_int, ata_irq);
  reg_config_param(sec, "dev_id", paramt_int, ata_dev_id);
  reg_config_param(sec, "dev_id", paramt_int, ata_dev_id);
  reg_config_param(sec, "rev", paramt_int, ata_rev);
  reg_config_param(sec, "rev", paramt_int, ata_rev);
 
 
 
  reg_config_param(sec, "pio_mode0_t1", paramt_int, ata_pio_mode0_t1);
 
  reg_config_param(sec, "pio_mode0_t2", paramt_int, ata_pio_mode0_t2);
 
  reg_config_param(sec, "pio_mode0_t4", paramt_int, ata_pio_mode0_t4);
 
  reg_config_param(sec, "pio_mode0_teoc", paramt_int, ata_pio_mode0_teoc);
 
 
 
  reg_config_param(sec, "dma_mode0_tm", paramt_int, ata_dma_mode0_tm);
 
  reg_config_param(sec, "dma_mode0_td", paramt_int, ata_dma_mode0_td);
 
  reg_config_param(sec, "dma_mode0_teoc", paramt_int, ata_dma_mode0_teoc);
 
 
  reg_config_param(sec, "dev_type0", paramt_int, ata_dev_type0);
  reg_config_param(sec, "dev_type0", paramt_int, ata_dev_type0);
  reg_config_param(sec, "dev_file0", paramt_str, ata_dev_file0);
  reg_config_param(sec, "dev_file0", paramt_str, ata_dev_file0);
  reg_config_param(sec, "dev_size0", paramt_int, ata_dev_size0);
  reg_config_param(sec, "dev_size0", paramt_int, ata_dev_size0);
  reg_config_param(sec, "dev_packet0", paramt_int, ata_dev_packet0);
  reg_config_param(sec, "dev_packet0", paramt_int, ata_dev_packet0);
  reg_config_param(sec, "dev_type1", paramt_int, ata_dev_type1);
  reg_config_param(sec, "dev_type1", paramt_int, ata_dev_type1);

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