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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [testbench/] [mc_async.h] - Diff between revs 473 and 552

Rev 473	Rev 552
Line 19...	Line 19...
`*/`	`*/`

`#ifndef __MC_ASYNC_H`	`#ifndef __MC_ASYNC_H`
`#define __MC_ASYNC_H`	`#define __MC_ASYNC_H`

	`/* should configuration be readm from MC? */`
	`#define MC_READ_CONF`

`/* TEMPLATE SELECTION */`	`/* TEMPLATE SELECTION */`
`/* change #undef to #define */`	`/* change #undef to #define */`
`#define _MC_TEST_TEMPLATE1`	`#define _MC_TEST_TEMPLATE1`
`#undef _MC_TEST_TEMPLATE2`	`#undef _MC_TEST_TEMPLATE2`
`#undef _MC_TEST_TEMPLATE3`	`#undef _MC_TEST_TEMPLATE3`
Line 31...	Line 34...
`/* memory configuration that must reflect mcmem.cfg */`	`/* memory configuration that must reflect mcmem.cfg */`
`#define MC_ASYNC_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */`	`#define MC_ASYNC_CSMASK 0xFE /* 8 bit mask for 8 chip selects. 1 ASYNC at CS, 0 something else at CS */`

`typedef struct MC_ASYNC_CS`	`typedef struct MC_ASYNC_CS`
`{`	`{`
`unsigned char BW;`	`unsigned long BW;`
`unsigned char M;`	`unsigned long M;`
`} MC_ASYNC_CS;`	`} MC_ASYNC_CS;`

`MC_ASYNC_CS mc_async_cs[8] = {`	`MC_ASYNC_CS mc_async_cs[8] = {`
`{ 2, /* Bus Width : 0 - 8bit, 1 - 16bit, 2 - 32bit */`	`{ 2, /* Bus Width : 0 - 8bit, 1 - 16bit, 2 - 32bit */`
`0x02 /* SELect mask */`	`0x02 /* SELect mask */`